x86: sipi_vector: Append appropriate suffixes
Assembler is not happy:
arch/x86/cpu/sipi_vector.S: Assembler messages:
arch/x86/cpu/sipi_vector.S:134: Warning: no instruction mnemonic suffix given and no register operands; using default for `cmp'
arch/x86/cpu/sipi_vector.S:139: Warning: no instruction mnemonic suffix given and no register operands; using default for `bts'
arch/x86/cpu/sipi_vector.S:157: Warning: no instruction mnemonic suffix given and no register operands; using default for `cmp'
Fix this by adding appropriate suffixes to the assembler commands.
Fixes: 45b5a37836d5 ("x86: Add multi-processor init")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
diff --git a/arch/x86/cpu/sipi_vector.S b/arch/x86/cpu/sipi_vector.S
index 40cc27f..fa1e6cb 100644
--- a/arch/x86/cpu/sipi_vector.S
+++ b/arch/x86/cpu/sipi_vector.S
@@ -131,12 +131,12 @@
jnz microcode_done
/* Determine if parallel microcode loading is allowed */
- cmp $0xffffffff, microcode_lock
+ cmpl $0xffffffff, microcode_lock
je load_microcode
/* Protect microcode loading */
lock_microcode:
- lock bts $0, microcode_lock
+ lock btsl $0, microcode_lock
jc lock_microcode
load_microcode:
@@ -154,7 +154,7 @@
popa
/* Unconditionally unlock microcode loading */
- cmp $0xffffffff, microcode_lock
+ cmpl $0xffffffff, microcode_lock
je microcode_done
xor %eax, %eax