Merge tag 'xilinx-for-v2025.01-rc3-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
AMD/Xilinx changes for v2025.01-rc3:
- microblaze:
- Disable JFFS2
- fpga:
- pass compatible flag to fpga_load()
- zynqmp:
- SOM RTC fix
- SC(system controller) PMW polarity fix
- Fix ram_top calculation with introducing XILINX_MINI
- Fix RPU release command
- versal:
- Enable capsule update
- Enable soft reset and Micron octal flashes
- xilinx:
- Align Kconfig regarding SPI_STACKED_PARALLEL
- bootcount:
- Add new zynqmp driver
diff --git a/MAINTAINERS b/MAINTAINERS
index bd2c494..8c6c0c2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -860,6 +860,7 @@
S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-microblaze.git
F: arch/arm/mach-zynqmp/
+F: drivers/bootcount/bootcount_zynqmp.c
F: drivers/clk/clk_zynqmp.c
F: driver/firmware/firmware-zynqmp.c
F: drivers/fpga/zynqpl.c
diff --git a/arch/arm/dts/zynqmp-sc-revB.dts b/arch/arm/dts/zynqmp-sc-revB.dts
index 1af3f64..c4f7058 100644
--- a/arch/arm/dts/zynqmp-sc-revB.dts
+++ b/arch/arm/dts/zynqmp-sc-revB.dts
@@ -3,7 +3,7 @@
* dts file for Xilinx ZynqMP Generic System Controller
*
* (C) Copyright 2021 - 2022, Xilinx, Inc.
- * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
+ * (C) Copyright 2022 - 2024, Advanced Micro Devices, Inc.
*
* Michal Simek <michal.simek@amd.com>
*/
@@ -80,7 +80,7 @@
pwm-fan {
compatible = "pwm-fan";
status = "okay";
- pwms = <&ttc0 2 40000 1>;
+ pwms = <&ttc0 2 40000 0>;
};
};
diff --git a/arch/arm/dts/zynqmp-sm-k26-revA.dts b/arch/arm/dts/zynqmp-sm-k26-revA.dts
index 8056f6b..8c43ade 100644
--- a/arch/arm/dts/zynqmp-sm-k26-revA.dts
+++ b/arch/arm/dts/zynqmp-sm-k26-revA.dts
@@ -387,6 +387,7 @@
&rtc {
status = "okay";
+ calibration = <0x7fff>;
};
&lpd_dma_chan1 {
diff --git a/arch/arm/mach-zynqmp/include/mach/hardware.h b/arch/arm/mach-zynqmp/include/mach/hardware.h
index 49e449e..3c372bd 100644
--- a/arch/arm/mach-zynqmp/include/mach/hardware.h
+++ b/arch/arm/mach-zynqmp/include/mach/hardware.h
@@ -188,6 +188,8 @@
u32 gen_storage4; /* 0x40 */
u32 reserved1[1];
u32 gen_storage6; /* 0x48 */
+ u32 reserved2[3];
+ u32 pers_gen_storage2; /* 0x58 */
};
#define pmu_base ((struct pmu_regs *)ZYNQMP_PMU_BASEADDR)
diff --git a/arch/arm/mach-zynqmp/mp.c b/arch/arm/mach-zynqmp/mp.c
index 6e6da80..448bc53 100644
--- a/arch/arm/mach-zynqmp/mp.c
+++ b/arch/arm/mach-zynqmp/mp.c
@@ -352,7 +352,7 @@
*/
flush_dcache_all();
- if (!strncmp(argv[1], "lockstep", 8)) {
+ if (!strcmp(argv[1], "lockstep") || !strcmp(argv[1], "0")) {
if (nr != ZYNQMP_CORE_RPU0) {
printf("Lockstep mode should run on ZYNQMP_CORE_RPU0\n");
return 1;
@@ -369,7 +369,7 @@
dcache_enable();
set_r5_halt_mode(nr, RELEASE, LOCK);
mark_r5_used(nr, LOCK);
- } else if (!strncmp(argv[1], "split", 5)) {
+ } else if (!strcmp(argv[1], "split") || !strcmp(argv[1], "1")) {
printf("R5 split mode\n");
set_r5_reset(nr, SPLIT);
set_r5_tcm_mode(SPLIT);
diff --git a/board/xilinx/Kconfig b/board/xilinx/Kconfig
index 0ff8440..f7152d6 100644
--- a/board/xilinx/Kconfig
+++ b/board/xilinx/Kconfig
@@ -40,6 +40,15 @@
endif
+config XILINX_MINI
+ bool "Mini configuration"
+ depends on ARCH_ZYNQMP || ARCH_VERSAL || ARCH_VERSAL_NET || ARCH_VERSAL2
+ help
+ This option disables features which are not needed for Mini U-Boot
+ configurations. Mini U-Boot is running in EL3 mostly on size contrained
+ systems. It's purpose is to program non volatile memories or running
+ initial memory tests.
+
config XILINX_OF_BOARD_DTB_ADDR
hex "Default DTB pickup address"
default 0x1000 if ARCH_VERSAL || ARCH_VERSAL_NET || ARCH_VERSAL2
diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c
index 38dd805..a12dccd 100644
--- a/board/xilinx/common/board.c
+++ b/board/xilinx/common/board.c
@@ -19,6 +19,7 @@
#include <i2c.h>
#include <linux/sizes.h>
#include <malloc.h>
+#include <memtop.h>
#include <mtd_node.h>
#include "board.h"
#include <dm.h>
@@ -676,3 +677,31 @@
return 0;
}
#endif
+
+#ifndef CONFIG_XILINX_MINI
+
+#ifndef MMU_SECTION_SIZE
+#define MMU_SECTION_SIZE (1 * 1024 * 1024)
+#endif
+
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
+{
+ phys_size_t size;
+ phys_addr_t reg;
+
+ if (!total_size)
+ return gd->ram_top;
+
+ if (!IS_ALIGNED((ulong)gd->fdt_blob, 0x8))
+ panic("Not 64bit aligned DT location: %p\n", gd->fdt_blob);
+
+ size = ALIGN(CONFIG_SYS_MALLOC_LEN + total_size, MMU_SECTION_SIZE);
+ reg = get_mem_top(gd->ram_base, gd->ram_size, size,
+ (void *)gd->fdt_blob);
+ if (!reg)
+ reg = gd->ram_top - size;
+
+ return reg + size;
+}
+
+#endif
diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c
index 3947467..fd5c6ce 100644
--- a/board/xilinx/versal/board.c
+++ b/board/xilinx/versal/board.c
@@ -12,12 +12,15 @@
#include <env_internal.h>
#include <log.h>
#include <malloc.h>
+#include <memalign.h>
+#include <mmc.h>
#include <time.h>
#include <asm/cache.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <asm/arch/sys_proto.h>
+#include <linux/sizes.h>
#include <dm/device.h>
#include <dm/uclass.h>
#include <versalpl.h>
@@ -301,9 +304,11 @@
return 0;
}
+#if !CONFIG_IS_ENABLED(SYSRESET)
void reset_cpu(void)
{
}
+#endif
#if defined(CONFIG_ENV_IS_NOWHERE)
enum env_location env_get_location(enum env_operation op, int prio)
@@ -336,3 +341,41 @@
}
}
#endif
+
+#if defined(CONFIG_SET_DFU_ALT_INFO)
+
+#define DFU_ALT_BUF_LEN SZ_1K
+
+void set_dfu_alt_info(char *interface, char *devstr)
+{
+ int bootseq = 0, len = 0;
+ u32 bootmode = versal_get_bootmode();
+
+ ALLOC_CACHE_ALIGN_BUFFER(char, buf, DFU_ALT_BUF_LEN);
+
+ if (env_get("dfu_alt_info"))
+ return;
+
+ memset(buf, 0, sizeof(buf));
+
+ switch (bootmode) {
+ case EMMC_MODE:
+ case SD_MODE:
+ case SD1_LSHFT_MODE:
+ case SD_MODE1:
+ bootseq = mmc_get_env_dev();
+
+ len += snprintf(buf + len, DFU_ALT_BUF_LEN, "mmc %d=boot",
+ bootseq);
+
+ len += snprintf(buf + len, DFU_ALT_BUF_LEN, ".bin fat %d 1",
+ bootseq);
+ break;
+ default:
+ return;
+ }
+
+ env_set("dfu_alt_info", buf);
+ puts("DFU alt info setting: done\n");
+}
+#endif
diff --git a/board/xilinx/zynqmp/zynqmp_kria.env b/board/xilinx/zynqmp/zynqmp_kria.env
index 927f398..ff3a092 100644
--- a/board/xilinx/zynqmp/zynqmp_kria.env
+++ b/board/xilinx/zynqmp/zynqmp_kria.env
@@ -77,6 +77,7 @@
tpm_kd240=if test ${card1_rev} = A; then run tpm_reset; fi
board_setup=\
+rtc dev 0; \
zynqmp mmio_write 0xFFCA0010 0xfff 0; \
if test ${card1_name} = SCK-KV-G; then run kv260_setup; run tpm_kv260; fi;\
if test ${card1_name} = SCK-KR-G; then run kr260_setup; run tpm_reset; fi;\
diff --git a/boot/image-board.c b/boot/image-board.c
index 1757e58..b726bd6 100644
--- a/boot/image-board.c
+++ b/boot/image-board.c
@@ -624,9 +624,10 @@
void *buf;
int conf_noffset;
int fit_img_result;
- const char *uname, *name;
+ const char *uname, *name, *compatible;
int err;
int devnum = 0; /* TODO support multi fpga platforms */
+ int flags = 0;
if (!IS_ENABLED(CONFIG_FPGA))
return -ENOSYS;
@@ -674,20 +675,29 @@
return fit_img_result;
}
+ conf_noffset = fit_image_get_node(buf, uname);
+ compatible = fdt_getprop(buf, conf_noffset, "compatible", NULL);
+ if (!compatible) {
+ printf("'fpga' image without 'compatible' property\n");
+ } else {
+ if (CONFIG_IS_ENABLED(FPGA_LOAD_SECURE))
+ flags = fpga_compatible2flag(devnum, compatible);
+ }
+
if (!fpga_is_partial_data(devnum, img_len)) {
name = "full";
err = fpga_loadbitstream(devnum, (char *)img_data,
img_len, BIT_FULL);
if (err)
err = fpga_load(devnum, (const void *)img_data,
- img_len, BIT_FULL, 0);
+ img_len, BIT_FULL, flags);
} else {
name = "partial";
err = fpga_loadbitstream(devnum, (char *)img_data,
img_len, BIT_PARTIAL);
if (err)
err = fpga_load(devnum, (const void *)img_data,
- img_len, BIT_PARTIAL, 0);
+ img_len, BIT_PARTIAL, flags);
}
if (err)
diff --git a/common/Makefile b/common/Makefile
index 2ee5ef9..3599156 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -7,6 +7,7 @@
ifndef CONFIG_XPL_BUILD
obj-y += init/
obj-y += main.o
+obj-y += memtop.o
obj-y += exports.o
obj-y += cli_getch.o cli_simple.o cli_readline.o
obj-$(CONFIG_HUSH_OLD_PARSER) += cli_hush.o
diff --git a/common/memtop.c b/common/memtop.c
new file mode 100644
index 0000000..841d89e
--- /dev/null
+++ b/common/memtop.c
@@ -0,0 +1,171 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2024, Linaro Limited
+ */
+
+#include <fdt_support.h>
+#include <fdtdec.h>
+#include <memtop.h>
+
+#include <asm/types.h>
+
+#define MEM_RGN_COUNT 16
+
+struct region {
+ phys_addr_t base;
+ phys_size_t size;
+};
+
+struct mem_region {
+ struct region rgn[MEM_RGN_COUNT];
+ uint count;
+};
+
+static void add_mem_region(struct mem_region *mem_rgn, phys_addr_t base,
+ phys_size_t size)
+{
+ long i;
+
+ for (i = mem_rgn->count; i >= 0; i--) {
+ if (i && base < mem_rgn->rgn[i - 1].base) {
+ mem_rgn->rgn[i] = mem_rgn->rgn[i - 1];
+ } else {
+ mem_rgn->rgn[i].base = base;
+ mem_rgn->rgn[i].size = size;
+ break;
+ }
+ }
+
+ mem_rgn->count++;
+}
+
+static void mem_regions_init(struct mem_region *mem)
+{
+ uint i;
+
+ mem->count = 0;
+ for (i = 0; i < MEM_RGN_COUNT; i++) {
+ mem->rgn[i].base = 0;
+ mem->rgn[i].size = 0;
+ }
+}
+
+static int fdt_add_reserved_regions(struct mem_region *free_mem,
+ struct mem_region *reserved_mem,
+ void *fdt_blob)
+{
+ u64 addr, size;
+ int i, total, ret;
+ int nodeoffset, subnode;
+ struct fdt_resource res;
+
+ if (fdt_check_header(fdt_blob) != 0)
+ return -1;
+
+ /* process memreserve sections */
+ total = fdt_num_mem_rsv(fdt_blob);
+ assert_noisy(total < MEM_RGN_COUNT);
+ for (i = 0; i < total; i++) {
+ if (fdt_get_mem_rsv(fdt_blob, i, &addr, &size) != 0)
+ continue;
+ add_mem_region(reserved_mem, addr, size);
+ }
+
+ i = 0;
+ /* process reserved-memory */
+ nodeoffset = fdt_subnode_offset(fdt_blob, 0, "reserved-memory");
+ if (nodeoffset >= 0) {
+ subnode = fdt_first_subnode(fdt_blob, nodeoffset);
+ while (subnode >= 0) {
+ /* check if this subnode has a reg property */
+ ret = fdt_get_resource(fdt_blob, subnode, "reg", 0,
+ &res);
+ if (!ret && fdtdec_get_is_enabled(fdt_blob, subnode)) {
+ addr = res.start;
+ size = res.end - res.start + 1;
+ assert_noisy(i < MEM_RGN_COUNT);
+ add_mem_region(reserved_mem, addr, size);
+ }
+
+ subnode = fdt_next_subnode(fdt_blob, subnode);
+ ++i;
+ }
+ }
+
+ return 0;
+}
+
+static long addrs_overlap(phys_addr_t base1, phys_size_t size1,
+ phys_addr_t base2, phys_size_t size2)
+{
+ const phys_addr_t base1_end = base1 + size1 - 1;
+ const phys_addr_t base2_end = base2 + size2 - 1;
+
+ return ((base1 <= base2_end) && (base2 <= base1_end));
+}
+
+static long region_overlap_check(struct mem_region *mem_rgn, phys_addr_t base,
+ phys_size_t size)
+{
+ unsigned long i;
+ struct region *rgn = mem_rgn->rgn;
+
+ for (i = 0; i < mem_rgn->count; i++) {
+ phys_addr_t rgnbase = rgn[i].base;
+ phys_size_t rgnsize = rgn[i].size;
+
+ if (addrs_overlap(base, size, rgnbase, rgnsize))
+ break;
+ }
+
+ return (i < mem_rgn->count) ? i : -1;
+}
+
+static int find_ram_top(struct mem_region *free_mem,
+ struct mem_region *reserved_mem, phys_size_t size)
+{
+ long i, rgn;
+ phys_addr_t base = 0;
+ phys_addr_t res_base;
+
+ for (i = free_mem->count - 1; i >= 0; i--) {
+ phys_addr_t rgnbase = free_mem->rgn[i].base;
+ phys_size_t rgnsize = free_mem->rgn[i].size;
+
+ if (rgnsize < size)
+ continue;
+
+ base = rgnbase + rgnsize - size;
+ while (base && rgnbase <= base) {
+ rgn = region_overlap_check(reserved_mem, base, size);
+ if (rgn < 0)
+ return base;
+
+ res_base = reserved_mem->rgn[rgn].base;
+ if (res_base < size)
+ break;
+ base = res_base - size;
+ }
+ }
+
+ return 0;
+}
+
+phys_addr_t get_mem_top(phys_addr_t ram_start, phys_size_t ram_size,
+ phys_size_t size, void *fdt)
+{
+ int i;
+ struct mem_region free_mem;
+ struct mem_region reserved_mem;
+
+ mem_regions_init(&free_mem);
+ mem_regions_init(&reserved_mem);
+
+ add_mem_region(&free_mem, ram_start, ram_size);
+
+ i = fdt_add_reserved_regions(&free_mem, &reserved_mem, fdt);
+ if (i < 0)
+ return 0;
+
+ return find_ram_top(&free_mem, &reserved_mem, size);
+}
diff --git a/configs/amd_versal2_mini_defconfig b/configs/amd_versal2_mini_defconfig
index ea22541..4c902e4 100644
--- a/configs/amd_versal2_mini_defconfig
+++ b/configs/amd_versal2_mini_defconfig
@@ -15,6 +15,7 @@
CONFIG_SYS_LOAD_ADDR=0xBBF80000
CONFIG_DEBUG_UART_BASE=0xf1920000
CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_XILINX_MINI=y
CONFIG_SYS_MEM_RSVD_FOR_MMU=y
# CONFIG_PSCI_RESET is not set
CONFIG_DEBUG_UART=y
diff --git a/configs/amd_versal2_mini_emmc_defconfig b/configs/amd_versal2_mini_emmc_defconfig
index 6d4b261..da3eebe 100644
--- a/configs/amd_versal2_mini_emmc_defconfig
+++ b/configs/amd_versal2_mini_emmc_defconfig
@@ -12,6 +12,7 @@
CONFIG_SYS_LOAD_ADDR=0x8000000
CONFIG_DEBUG_UART_BASE=0xf1920000
CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_XILINX_MINI=y
# CONFIG_PSCI_RESET is not set
CONFIG_DEBUG_UART=y
# CONFIG_EXPERT is not set
diff --git a/configs/amd_versal2_mini_ospi_defconfig b/configs/amd_versal2_mini_ospi_defconfig
index 71bd667..d881cd4 100644
--- a/configs/amd_versal2_mini_ospi_defconfig
+++ b/configs/amd_versal2_mini_ospi_defconfig
@@ -15,6 +15,7 @@
CONFIG_SYS_LOAD_ADDR=0xBBF80000
CONFIG_DEBUG_UART_BASE=0xf1920000
CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_XILINX_MINI=y
CONFIG_SYS_MEM_RSVD_FOR_MMU=y
# CONFIG_PSCI_RESET is not set
CONFIG_DEBUG_UART=y
diff --git a/configs/amd_versal2_mini_qspi_defconfig b/configs/amd_versal2_mini_qspi_defconfig
index 3947604..eb63f06 100644
--- a/configs/amd_versal2_mini_qspi_defconfig
+++ b/configs/amd_versal2_mini_qspi_defconfig
@@ -15,6 +15,7 @@
CONFIG_SYS_LOAD_ADDR=0xBBF80000
CONFIG_DEBUG_UART_BASE=0xf1920000
CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_XILINX_MINI=y
CONFIG_SYS_MEM_RSVD_FOR_MMU=y
# CONFIG_PSCI_RESET is not set
CONFIG_DEBUG_UART=y
diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig
index a9d595c..2e618d8 100644
--- a/configs/microblaze-generic_defconfig
+++ b/configs/microblaze-generic_defconfig
@@ -47,7 +47,6 @@
CONFIG_BOOTP_BOOTFILESIZE=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_JFFS2=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
diff --git a/configs/xilinx_versal_mini_defconfig b/configs/xilinx_versal_mini_defconfig
index 7388a78..ac3815b 100644
--- a/configs/xilinx_versal_mini_defconfig
+++ b/configs/xilinx_versal_mini_defconfig
@@ -12,6 +12,7 @@
CONFIG_ENV_SIZE=0x80
CONFIG_DEFAULT_DEVICE_TREE="versal-mini"
CONFIG_SYS_LOAD_ADDR=0x8000000
+CONFIG_XILINX_MINI=y
CONFIG_SYS_MEM_RSVD_FOR_MMU=y
# CONFIG_PSCI_RESET is not set
CONFIG_SYS_MEMTEST_START=0x00000000
diff --git a/configs/xilinx_versal_mini_emmc0_defconfig b/configs/xilinx_versal_mini_emmc0_defconfig
index a36e40d..21f241e 100644
--- a/configs/xilinx_versal_mini_emmc0_defconfig
+++ b/configs/xilinx_versal_mini_emmc0_defconfig
@@ -12,6 +12,7 @@
CONFIG_ENV_SIZE=0x80
CONFIG_DEFAULT_DEVICE_TREE="versal-mini-emmc0"
CONFIG_SYS_LOAD_ADDR=0x8000000
+CONFIG_XILINX_MINI=y
# CONFIG_PSCI_RESET is not set
# CONFIG_EXPERT is not set
CONFIG_REMAKE_ELF=y
diff --git a/configs/xilinx_versal_mini_emmc1_defconfig b/configs/xilinx_versal_mini_emmc1_defconfig
index 3ae2115..6cb654c 100644
--- a/configs/xilinx_versal_mini_emmc1_defconfig
+++ b/configs/xilinx_versal_mini_emmc1_defconfig
@@ -12,6 +12,7 @@
CONFIG_ENV_SIZE=0x80
CONFIG_DEFAULT_DEVICE_TREE="versal-mini-emmc1"
CONFIG_SYS_LOAD_ADDR=0x8000000
+CONFIG_XILINX_MINI=y
# CONFIG_PSCI_RESET is not set
# CONFIG_EXPERT is not set
CONFIG_REMAKE_ELF=y
diff --git a/configs/xilinx_versal_mini_ospi_defconfig b/configs/xilinx_versal_mini_ospi_defconfig
index d0ea2b6..c2a5624 100644
--- a/configs/xilinx_versal_mini_ospi_defconfig
+++ b/configs/xilinx_versal_mini_ospi_defconfig
@@ -13,6 +13,7 @@
# CONFIG_DM_GPIO is not set
CONFIG_DEFAULT_DEVICE_TREE="versal-mini-ospi-single"
CONFIG_SYS_LOAD_ADDR=0x8000000
+CONFIG_XILINX_MINI=y
CONFIG_SYS_MEM_RSVD_FOR_MMU=y
CONFIG_VERSAL_NO_DDR=y
# CONFIG_PSCI_RESET is not set
diff --git a/configs/xilinx_versal_mini_qspi_defconfig b/configs/xilinx_versal_mini_qspi_defconfig
index ef6eec0..4d23b35 100644
--- a/configs/xilinx_versal_mini_qspi_defconfig
+++ b/configs/xilinx_versal_mini_qspi_defconfig
@@ -11,6 +11,7 @@
CONFIG_ENV_SIZE=0x80
CONFIG_DEFAULT_DEVICE_TREE="versal-mini-qspi-single"
CONFIG_SYS_LOAD_ADDR=0x8000000
+CONFIG_XILINX_MINI=y
CONFIG_SYS_MEM_RSVD_FOR_MMU=y
CONFIG_VERSAL_NO_DDR=y
# CONFIG_PSCI_RESET is not set
diff --git a/configs/xilinx_versal_net_mini_defconfig b/configs/xilinx_versal_net_mini_defconfig
index 1640dfa..e489f70 100644
--- a/configs/xilinx_versal_net_mini_defconfig
+++ b/configs/xilinx_versal_net_mini_defconfig
@@ -14,6 +14,7 @@
CONFIG_ENV_SIZE=0x80
CONFIG_DEFAULT_DEVICE_TREE="versal-net-mini"
CONFIG_SYS_LOAD_ADDR=0xBBF00000
+CONFIG_XILINX_MINI=y
CONFIG_SYS_MEM_RSVD_FOR_MMU=y
# CONFIG_PSCI_RESET is not set
CONFIG_SYS_MEMTEST_START=0x00000000
diff --git a/configs/xilinx_versal_net_mini_emmc_defconfig b/configs/xilinx_versal_net_mini_emmc_defconfig
index 4c6159a..ab20156 100644
--- a/configs/xilinx_versal_net_mini_emmc_defconfig
+++ b/configs/xilinx_versal_net_mini_emmc_defconfig
@@ -10,6 +10,7 @@
CONFIG_ENV_SIZE=0x80
CONFIG_DEFAULT_DEVICE_TREE="versal-net-mini-emmc"
CONFIG_SYS_LOAD_ADDR=0x8000000
+CONFIG_XILINX_MINI=y
# CONFIG_PSCI_RESET is not set
# CONFIG_EXPERT is not set
CONFIG_REMAKE_ELF=y
diff --git a/configs/xilinx_versal_net_mini_ospi_defconfig b/configs/xilinx_versal_net_mini_ospi_defconfig
index 071eeb8..f5864b5 100644
--- a/configs/xilinx_versal_net_mini_ospi_defconfig
+++ b/configs/xilinx_versal_net_mini_ospi_defconfig
@@ -13,6 +13,7 @@
# CONFIG_DM_GPIO is not set
CONFIG_DEFAULT_DEVICE_TREE="versal-net-mini-ospi-single"
CONFIG_SYS_LOAD_ADDR=0xBBF80000
+CONFIG_XILINX_MINI=y
CONFIG_SYS_MEM_RSVD_FOR_MMU=y
# CONFIG_PSCI_RESET is not set
CONFIG_LTO=y
diff --git a/configs/xilinx_versal_net_mini_qspi_defconfig b/configs/xilinx_versal_net_mini_qspi_defconfig
index 227c45d..8453be5 100644
--- a/configs/xilinx_versal_net_mini_qspi_defconfig
+++ b/configs/xilinx_versal_net_mini_qspi_defconfig
@@ -11,6 +11,7 @@
CONFIG_ENV_SIZE=0x80
CONFIG_DEFAULT_DEVICE_TREE="versal-net-mini-qspi-single"
CONFIG_SYS_LOAD_ADDR=0xBBF80000
+CONFIG_XILINX_MINI=y
CONFIG_SYS_MEM_RSVD_FOR_MMU=y
# CONFIG_PSCI_RESET is not set
CONFIG_LTO=y
diff --git a/configs/xilinx_versal_net_virt_defconfig b/configs/xilinx_versal_net_virt_defconfig
index a9320de..30d79ab 100644
--- a/configs/xilinx_versal_net_virt_defconfig
+++ b/configs/xilinx_versal_net_virt_defconfig
@@ -133,6 +133,7 @@
CONFIG_CADENCE_OSPI_VERSAL=y
CONFIG_ZYNQ_SPI=y
CONFIG_ZYNQMP_GQSPI=y
+CONFIG_SPI_STACKED_PARALLEL=y
CONFIG_TPM2_TIS_SPI=y
CONFIG_USB=y
CONFIG_DM_USB_GADGET=y
diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig
index f220cc0..c8f166c 100644
--- a/configs/xilinx_versal_virt_defconfig
+++ b/configs/xilinx_versal_virt_defconfig
@@ -4,6 +4,7 @@
CONFIG_SYS_INIT_SP_BSS_OFFSET=1572864
CONFIG_ARCH_VERSAL=y
CONFIG_TEXT_BASE=0x8000000
+CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_SYS_MALLOC_F_LEN=0x100000
CONFIG_NR_DRAM_BANKS=36
CONFIG_SF_DEFAULT_SPEED=30000000
@@ -18,6 +19,10 @@
CONFIG_SYS_MEMTEST_START=0x00000000
CONFIG_SYS_MEMTEST_END=0x00001000
CONFIG_REMAKE_ELF=y
+CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
+CONFIG_EFI_CAPSULE_ON_DISK=y
+CONFIG_EFI_CAPSULE_ON_DISK_EARLY=y
+CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
CONFIG_EFI_HTTP_BOOT=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
@@ -76,6 +81,7 @@
CONFIG_SIMPLE_PM_BUS=y
CONFIG_CLK_VERSAL=y
CONFIG_DFU_TIMEOUT=y
+CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1800000
CONFIG_ARM_FFA_TRANSPORT=y
@@ -99,11 +105,14 @@
CONFIG_ZYNQ_SDHCI_MIN_FREQ=100000
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_SOFT_RESET=y
+CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_ISSI=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_MT35XU=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
@@ -136,6 +145,9 @@
CONFIG_CADENCE_OSPI_VERSAL=y
CONFIG_ZYNQ_SPI=y
CONFIG_ZYNQMP_GQSPI=y
+CONFIG_SPI_STACKED_PARALLEL=y
+CONFIG_SYSRESET=y
+CONFIG_SYSRESET_PSCI=y
CONFIG_TPM2_TIS_SPI=y
CONFIG_USB=y
CONFIG_DM_USB_GADGET=y
diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig
index e00b386..ed3d101 100644
--- a/configs/xilinx_zynq_virt_defconfig
+++ b/configs/xilinx_zynq_virt_defconfig
@@ -146,6 +146,7 @@
CONFIG_ZYNQ_SERIAL=y
CONFIG_ZYNQ_SPI=y
CONFIG_ZYNQ_QSPI=y
+CONFIG_SPI_STACKED_PARALLEL=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_ULPI_VIEWPORT=y
diff --git a/configs/xilinx_zynqmp_kria_defconfig b/configs/xilinx_zynqmp_kria_defconfig
index 5757a0c..e5ffc70 100644
--- a/configs/xilinx_zynqmp_kria_defconfig
+++ b/configs/xilinx_zynqmp_kria_defconfig
@@ -187,7 +187,6 @@
CONFIG_PWM_CADENCE_TTC=y
CONFIG_RESET_ZYNQMP=y
CONFIG_DM_RTC=y
-CONFIG_RTC_EMULATION=y
CONFIG_RTC_ZYNQMP=y
CONFIG_SCSI=y
CONFIG_ARM_DCC=y
diff --git a/configs/xilinx_zynqmp_mini_defconfig b/configs/xilinx_zynqmp_mini_defconfig
index 7aab69c..b58cf8a 100644
--- a/configs/xilinx_zynqmp_mini_defconfig
+++ b/configs/xilinx_zynqmp_mini_defconfig
@@ -9,6 +9,7 @@
CONFIG_ENV_SIZE=0x80
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini"
CONFIG_SYS_LOAD_ADDR=0x8000000
+CONFIG_XILINX_MINI=y
CONFIG_SYS_MEM_RSVD_FOR_MMU=y
CONFIG_SYS_MEMTEST_START=0x00000000
CONFIG_SYS_MEMTEST_END=0x00001000
diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig
index c56b1e83..f47880b 100644
--- a/configs/xilinx_zynqmp_mini_emmc0_defconfig
+++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig
@@ -15,6 +15,7 @@
CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SYS_LOAD_ADDR=0x8000000
CONFIG_SPL=y
+CONFIG_XILINX_MINI=y
CONFIG_REMAKE_ELF=y
# CONFIG_MP is not set
# CONFIG_EFI_LOADER is not set
diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig
index a8dbf00..fc0070a 100644
--- a/configs/xilinx_zynqmp_mini_emmc1_defconfig
+++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig
@@ -15,6 +15,7 @@
CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SYS_LOAD_ADDR=0x8000000
CONFIG_SPL=y
+CONFIG_XILINX_MINI=y
CONFIG_REMAKE_ELF=y
# CONFIG_MP is not set
# CONFIG_EFI_LOADER is not set
diff --git a/configs/xilinx_zynqmp_mini_nand_defconfig b/configs/xilinx_zynqmp_mini_nand_defconfig
index ba8f02c..6a7541f 100644
--- a/configs/xilinx_zynqmp_mini_nand_defconfig
+++ b/configs/xilinx_zynqmp_mini_nand_defconfig
@@ -10,6 +10,7 @@
CONFIG_ENV_SIZE=0x80
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-nand"
CONFIG_SYS_LOAD_ADDR=0x8000000
+CONFIG_XILINX_MINI=y
CONFIG_REMAKE_ELF=y
# CONFIG_MP is not set
# CONFIG_EFI_LOADER is not set
diff --git a/configs/xilinx_zynqmp_mini_nand_single_defconfig b/configs/xilinx_zynqmp_mini_nand_single_defconfig
index a8a0055..3643cae 100644
--- a/configs/xilinx_zynqmp_mini_nand_single_defconfig
+++ b/configs/xilinx_zynqmp_mini_nand_single_defconfig
@@ -10,6 +10,7 @@
CONFIG_ENV_SIZE=0x80
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-nand"
CONFIG_SYS_LOAD_ADDR=0x8000000
+CONFIG_XILINX_MINI=y
CONFIG_REMAKE_ELF=y
# CONFIG_MP is not set
# CONFIG_EFI_LOADER is not set
diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig
index c08b10c..a60403d 100644
--- a/configs/xilinx_zynqmp_mini_qspi_defconfig
+++ b/configs/xilinx_zynqmp_mini_qspi_defconfig
@@ -15,6 +15,7 @@
CONFIG_SPL=y
# CONFIG_SPL_FS_FAT is not set
# CONFIG_SPL_LIBDISK_SUPPORT is not set
+CONFIG_XILINX_MINI=y
CONFIG_SYS_MEM_RSVD_FOR_MMU=y
CONFIG_ZYNQMP_NO_DDR=y
# CONFIG_PSCI_RESET is not set
diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig
index f3d83a2..310efdf 100644
--- a/configs/xilinx_zynqmp_virt_defconfig
+++ b/configs/xilinx_zynqmp_virt_defconfig
@@ -210,6 +210,7 @@
CONFIG_SPI=y
CONFIG_ZYNQ_SPI=y
CONFIG_ZYNQMP_GQSPI=y
+CONFIG_SPI_STACKED_PARALLEL=y
CONFIG_SYSRESET=y
CONFIG_SYSRESET_CMD_POWEROFF=y
CONFIG_SYSRESET_PSCI=y
diff --git a/drivers/bootcount/Kconfig b/drivers/bootcount/Kconfig
index fa6d8e7..0080d2a 100644
--- a/drivers/bootcount/Kconfig
+++ b/drivers/bootcount/Kconfig
@@ -164,6 +164,13 @@
Accessing the backend is done using the regmap interface.
+config DM_BOOTCOUNT_ZYNQMP
+ bool "Support ZynqMP PMUFW as a backing store for bootcount"
+ depends on ARCH_ZYNQMP
+ help
+ Enable support for the bootcount API by utilising the Persistent
+ Global General Storage Register 2 of the PMU.
+
endmenu
endif
diff --git a/drivers/bootcount/Makefile b/drivers/bootcount/Makefile
index 245f879..0cf79e4 100644
--- a/drivers/bootcount/Makefile
+++ b/drivers/bootcount/Makefile
@@ -16,3 +16,4 @@
obj-$(CONFIG_DM_BOOTCOUNT_I2C) += bootcount_dm_i2c.o
obj-$(CONFIG_DM_BOOTCOUNT_SPI_FLASH) += spi-flash.o
obj-$(CONFIG_DM_BOOTCOUNT_SYSCON) += bootcount_syscon.o
+obj-$(CONFIG_DM_BOOTCOUNT_ZYNQMP) += bootcount_zynqmp.o
diff --git a/drivers/bootcount/bootcount_zynqmp.c b/drivers/bootcount/bootcount_zynqmp.c
new file mode 100644
index 0000000..bc0984e
--- /dev/null
+++ b/drivers/bootcount/bootcount_zynqmp.c
@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: GPL-2.0+
+// SPDX-FileCopyrightText: 2024 CERN (home.cern)
+
+#include <bootcount.h>
+#include <dm.h>
+#include <stdio.h>
+#include <zynqmp_firmware.h>
+#include <asm/arch/hardware.h>
+#include <dm/platdata.h>
+
+static int bootcount_zynqmp_set(struct udevice *dev, const u32 val)
+{
+ int ret;
+
+ ret = zynqmp_mmio_write((ulong)&pmu_base->pers_gen_storage2, 0xFF, val);
+ if (ret)
+ pr_info("%s write fail\n", __func__);
+
+ return ret;
+}
+
+static int bootcount_zynqmp_get(struct udevice *dev, u32 *val)
+{
+ int ret;
+
+ *val = 0;
+ ret = zynqmp_mmio_read((ulong)&pmu_base->pers_gen_storage2, val);
+ if (ret)
+ pr_info("%s read fail\n", __func__);
+
+ return ret;
+}
+
+U_BOOT_DRVINFO(bootcount_zynqmp) = {
+ .name = "bootcount_zynqmp",
+};
+
+static const struct bootcount_ops bootcount_zynqmp_ops = {
+ .get = bootcount_zynqmp_get,
+ .set = bootcount_zynqmp_set,
+};
+
+U_BOOT_DRIVER(bootcount_zynqmp) = {
+ .name = "bootcount_zynqmp",
+ .id = UCLASS_BOOTCOUNT,
+ .ops = &bootcount_zynqmp_ops,
+};
diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
index 9c466f8..331a46d 100644
--- a/drivers/spi/cadence_qspi.c
+++ b/drivers/spi/cadence_qspi.c
@@ -251,13 +251,6 @@
priv->wr_delay = 50 * DIV_ROUND_UP(NSEC_PER_SEC, priv->ref_clk_hz);
- /* Versal and Versal-NET use spi calibration to set read delay */
- if (CONFIG_IS_ENABLED(ARCH_VERSAL) ||
- CONFIG_IS_ENABLED(ARCH_VERSAL_NET) ||
- CONFIG_IS_ENABLED(ARCH_VERSAL2))
- if (priv->read_delay >= 0)
- priv->read_delay = -1;
-
/* Reset ospi flash device */
return cadence_qspi_versal_flash_reset(bus);
}
diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h
index 6740ab2..3bcc4c4 100644
--- a/include/configs/microblaze-generic.h
+++ b/include/configs/microblaze-generic.h
@@ -82,7 +82,7 @@
"nor0=flash-0\0"\
"mtdparts=mtdparts=flash-0:"\
"256k(u-boot),256k(env),3m(kernel),"\
- "1m(romfs),1m(cramfs),-(jffs2)\0"\
+ "1m(romfs),1m(cramfs),-(fs)\0"\
"nc=setenv stdout nc;"\
"setenv stdin nc\0" \
"serial=setenv stdout serial;"\
diff --git a/include/memtop.h b/include/memtop.h
new file mode 100644
index 0000000..28f62e2
--- /dev/null
+++ b/include/memtop.h
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2024, Linaro Limited
+ */
+
+/**
+ * get_mem_top() - Compute the value of ram_top
+ * @ram_start: Start of RAM
+ * @ram_size: RAM size
+ * @size: Minimum RAM size requested
+ * @fdt: FDT blob
+ *
+ * The function computes the top address of RAM memory that can be
+ * used by U-Boot. This is being done by going through the list of
+ * reserved memory regions specified in the devicetree blob passed
+ * to the function. The logic used here is derived from the lmb
+ * allocation function.
+ *
+ * Return: address of ram top on success, 0 on failure
+ */
+phys_addr_t get_mem_top(phys_addr_t ram_start, phys_size_t ram_size,
+ phys_size_t size, void *fdt);