powerpc: MPC8555: Remove macro CONFIG_MPC8555
Replace CONFIG_MPC8555 with ARCH_MPC8555 in Kconfig and clean up existing
macros.
Signed-off-by: York Sun <york.sun@nxp.com>
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 8b08ee2..c58f76f 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -76,6 +76,7 @@
config TARGET_MPC8555CDS
bool "Support MPC8555CDS"
+ select ARCH_MPC8555
config TARGET_MPC8560ADS
bool "Support MPC8560ADS"
@@ -207,6 +208,9 @@
config ARCH_MPC8548
bool
+config ARCH_MPC8555
+ bool
+
source "board/freescale/b4860qds/Kconfig"
source "board/freescale/bsc9131rdb/Kconfig"
source "board/freescale/bsc9132qds/Kconfig"
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index c563744..3e6f8f3 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -294,7 +294,7 @@
{
/* Everything after the first generation of PQ3 parts has RSTCR */
#if defined(CONFIG_ARCH_MPC8540) || defined(CONFIG_ARCH_MPC8541) || \
- defined(CONFIG_MPC8555) || defined(CONFIG_MPC8560)
+ defined(CONFIG_ARCH_MPC8555) || defined(CONFIG_MPC8560)
unsigned long val, msr;
/*
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index bd810d7..93c7193 100644
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -626,7 +626,7 @@
*/
lcrr_div *= 4;
#elif !defined(CONFIG_ARCH_MPC8540) && !defined(CONFIG_ARCH_MPC8541) && \
- !defined(CONFIG_MPC8555) && !defined(CONFIG_MPC8560)
+ !defined(CONFIG_ARCH_MPC8555) && !defined(CONFIG_MPC8560)
/*
* Yes, the entire PQ38 family use the same
* bit-representation for twice the clock divider values.
@@ -682,7 +682,7 @@
* AN2919.
*/
#if defined(CONFIG_ARCH_MPC8540) || defined(CONFIG_ARCH_MPC8541) || \
- defined(CONFIG_MPC8560) || defined(CONFIG_MPC8555) || \
+ defined(CONFIG_MPC8560) || defined(CONFIG_ARCH_MPC8555) || \
defined(CONFIG_P1022)
gd->arch.i2c1_clk = sys_info.freq_systembus;
#elif defined(CONFIG_ARCH_MPC8544)
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index f16e32e..4e38d23 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -85,7 +85,7 @@
#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
#define CONFIG_SYS_FSL_A004447_SVR_REV 0x00
-#elif defined(CONFIG_MPC8555)
+#elif defined(CONFIG_ARCH_MPC8555)
#define CONFIG_MAX_CPUS 1
#define CONFIG_SYS_FSL_NUM_LAWS 8
#define CONFIG_SYS_FSL_DDRC_GEN1
diff --git a/arch/powerpc/include/asm/cpm_85xx.h b/arch/powerpc/include/asm/cpm_85xx.h
index e89e2f0..b46e20e 100644
--- a/arch/powerpc/include/asm/cpm_85xx.h
+++ b/arch/powerpc/include/asm/cpm_85xx.h
@@ -77,7 +77,7 @@
*/
#define CPM_DATAONLY_BASE ((uint)128)
#define CPM_DP_NOSPACE ((uint)0x7FFFFFFF)
-#if defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_MPC8555)
+#if defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_ARCH_MPC8555)
#define CPM_FCC_SPECIAL_BASE ((uint)0x00009000)
#define CPM_DATAONLY_SIZE ((uint)(8 * 1024) - CPM_DATAONLY_BASE)
#else /* MPC8540, MPC8560 */
diff --git a/arch/powerpc/include/asm/fsl_lbc.h b/arch/powerpc/include/asm/fsl_lbc.h
index c7805e9..ff9b2d9 100644
--- a/arch/powerpc/include/asm/fsl_lbc.h
+++ b/arch/powerpc/include/asm/fsl_lbc.h
@@ -326,7 +326,7 @@
#define LCRR_CLKDIV 0x0000001F
#define LCRR_CLKDIV_SHIFT 0
#if defined(CONFIG_MPC83xx) || defined(CONFIG_ARCH_MPC8540) || \
- defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_MPC8555) || \
+ defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_ARCH_MPC8555) || \
defined(CONFIG_MPC8560)
#define LCRR_CLKDIV_2 0x00000002
#define LCRR_CLKDIV_4 0x00000004
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index 4754aa8..d6e7f62 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -127,7 +127,7 @@
#if defined(CONFIG_ARCH_MPC8540) || \
defined(CONFIG_ARCH_MPC8541) || \
defined(CONFIG_ARCH_MPC8548) || \
- defined(CONFIG_MPC8555)
+ defined(CONFIG_ARCH_MPC8555)
/* DUART Registers */
typedef struct ccsr_duart {
u8 res1[1280];