arm: zynq: Convert all board to use arch ps7_init code
Use generic implementation. It will also reduce config data size for
converted boards.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
diff --git a/board/opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.c b/board/opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.c
index 5aa3951..3bd02f3 100644
--- a/board/opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.c
+++ b/board/opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.c
@@ -5,8 +5,7 @@
* SPDX-License-Identifier: GPL-2.0+
*****************************************************************************/
-#include "ps7_init_gpl.h"
-#include "asm/io.h"
+#include <asm/arch/ps7_init_gpl.h>
unsigned long ps7_pll_init_data_3_0[] = {
EMIT_WRITE(0XF8000008, 0x0000DF0DU),
@@ -255,92 +254,11 @@
EMIT_EXIT(),
};
-
unsigned long ps7_reset_apu_3_0[] = {
EMIT_MASKWRITE(0xF8000244, 0x00000022U, 0x00000022U),
EMIT_EXIT(),
};
-#define PS7_MASK_POLL_TIME 100000000
-
-static inline void iowrite(unsigned long val, unsigned long addr)
-{
- __raw_writel(val, addr);
-}
-
-static inline unsigned long ioread(unsigned long addr)
-{
- return __raw_readl(addr);
-}
-
-int ps7_config(unsigned long *ps7_config_init)
-{
- unsigned long *ptr = ps7_config_init;
-
- unsigned long opcode; /* current instruction .. */
- unsigned long args[16]; /* no opcode has so many args ... */
- int numargs; /* number of arguments of this instruction */
- int j; /* general purpose index */
-
- unsigned long addr;
- unsigned long val, mask;
-
- int finish = -1; /* loop while this is negative ! */
- int i = 0; /* Timeout variable */
-
- while (finish < 0) {
- numargs = ptr[0] & 0xF;
- opcode = ptr[0] >> 4;
-
- for (j = 0; j < numargs; j++)
- args[j] = ptr[j + 1];
- ptr += numargs + 1;
-
- switch (opcode) {
- case OPCODE_EXIT:
- finish = PS7_INIT_SUCCESS;
- break;
-
- case OPCODE_WRITE:
- addr = args[0];
- val = args[1];
- iowrite(val, addr);
- break;
-
- case OPCODE_MASKWRITE:
- addr = args[0];
- mask = args[1];
- val = args[2];
- iowrite((val & mask) | (ioread(addr) & ~mask) , addr);
- break;
-
- case OPCODE_MASKPOLL:
- addr = args[0];
- mask = args[1];
- i = 0;
- while (!(ioread(addr) & mask)) {
- if (i == PS7_MASK_POLL_TIME) {
- finish = PS7_INIT_TIMEOUT;
- break;
- }
- i++;
- }
- break;
- case OPCODE_MASKDELAY:
- addr = args[0];
- mask = args[1];
- int delay = get_number_of_cycles_for_delay(mask);
- perf_reset_and_start_timer();
- while (ioread(addr) < delay)
- ;
- break;
- default:
- finish = PS7_INIT_CORRUPT;
- break;
- }
- }
- return finish;
-}
int ps7_post_config(void)
{
@@ -377,39 +295,3 @@
return PS7_INIT_SUCCESS;
}
-/* For delay calculation using global timer */
-
-/* start timer */
-void perf_start_clock(void)
-{
- iowrite((1 << 0) | /* Timer Enable */
- (1 << 3) | /* Auto-increment */
- (0 << 8), /* Pre-scale */
- SCU_GLOBAL_TIMER_CONTROL);
-}
-
-/* stop timer and reset timer count regs */
-void perf_reset_clock(void)
-{
- perf_disable_clock();
- iowrite(0, SCU_GLOBAL_TIMER_COUNT_L32);
- iowrite(0, SCU_GLOBAL_TIMER_COUNT_U32);
-}
-
-/* Compute mask for given delay in miliseconds*/
-int get_number_of_cycles_for_delay(unsigned int delay)
-{
- return APU_FREQ * delay / (2 * 1000);
-}
-
-/* stop timer */
-void perf_disable_clock(void)
-{
- iowrite(0, SCU_GLOBAL_TIMER_CONTROL);
-}
-
-void perf_reset_and_start_timer(void)
-{
- perf_reset_clock();
- perf_start_clock();
-}
diff --git a/board/opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.h b/board/opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.h
deleted file mode 100644
index cffffa9..0000000
--- a/board/opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.h
+++ /dev/null
@@ -1,80 +0,0 @@
-/******************************************************************************
-*
-* (c) Copyright 2010-2014 Xilinx, Inc. All rights reserved.
-*
-* SPDX-License-Identifier: GPL-2.0+
-*****************************************************************************/
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#define OPCODE_EXIT 0U
-#define OPCODE_CLEAR 1U
-#define OPCODE_WRITE 2U
-#define OPCODE_MASKWRITE 3U
-#define OPCODE_MASKPOLL 4U
-#define OPCODE_MASKDELAY 5U
-
-/* Encode number of arguments in last nibble */
-#define EMIT_EXIT() ((OPCODE_EXIT << 4) | 0)
-#define EMIT_WRITE(addr, val) ((OPCODE_WRITE << 4) | 2) , addr, val
-#define EMIT_MASKWRITE(addr, mask, val) ((OPCODE_MASKWRITE << 4) | 3) ,\
- addr, mask, val
-#define EMIT_MASKPOLL(addr, mask) ((OPCODE_MASKPOLL << 4) | 2) ,\
- addr, mask
-#define EMIT_MASKDELAY(addr, mask) ((OPCODE_MASKDELAY << 4) | 2) ,\
- addr, mask
-
-/* Returns codes of PS7_Init */
-#define PS7_INIT_SUCCESS (0)
-#define PS7_INIT_CORRUPT (1)
-#define PS7_INIT_TIMEOUT (2)
-#define PS7_POLL_FAILED_DDR_INIT (3)
-#define PS7_POLL_FAILED_DMA (4)
-#define PS7_POLL_FAILED_PLL (5)
-
-/* Freq of all peripherals */
-
-#define APU_FREQ 650000000
-#define DDR_FREQ 525000000
-#define DCI_FREQ 10096154
-#define QSPI_FREQ 200000000
-#define SMC_FREQ 10000000
-#define ENET0_FREQ 125000000
-#define ENET1_FREQ 10000000
-#define USB0_FREQ 60000000
-#define USB1_FREQ 60000000
-#define SDIO_FREQ 100000000
-#define UART_FREQ 100000000
-#define SPI_FREQ 10000000
-#define I2C_FREQ 108333336
-#define WDT_FREQ 108333336
-#define TTC_FREQ 50000000
-#define CAN_FREQ 10000000
-#define PCAP_FREQ 200000000
-#define TPIU_FREQ 200000000
-#define FPGA0_FREQ 50000000
-#define FPGA1_FREQ 10000000
-#define FPGA2_FREQ 10000000
-#define FPGA3_FREQ 10000000
-
-
-/* For delay calculation using global registers*/
-#define SCU_GLOBAL_TIMER_COUNT_L32 0xF8F00200
-#define SCU_GLOBAL_TIMER_COUNT_U32 0xF8F00204
-#define SCU_GLOBAL_TIMER_CONTROL 0xF8F00208
-#define SCU_GLOBAL_TIMER_AUTO_INC 0xF8F00218
-
-int ps7_config(unsigned long *);
-int ps7_init(void);
-int ps7_post_config(void);
-
-void perf_start_clock(void);
-void perf_disable_clock(void);
-void perf_reset_clock(void);
-void perf_reset_and_start_timer(void);
-int get_number_of_cycles_for_delay(unsigned int delay);
-#ifdef __cplusplus
-}
-#endif