phy: Move qcom SoCs specific phy drivers to qcom folder
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
diff --git a/drivers/phy/qcom/Kconfig b/drivers/phy/qcom/Kconfig
new file mode 100644
index 0000000..f685a64
--- /dev/null
+++ b/drivers/phy/qcom/Kconfig
@@ -0,0 +1,13 @@
+config MSM8916_USB_PHY
+ bool "Qualcomm MSM8916 USB PHY support"
+ depends on PHY
+ help
+ Support the USB PHY in msm8916
+
+ This PHY is found on qualcomm dragonboard410c development board.
+
+config PHY_QCOM_IPQ4019_USB
+ tristate "Qualcomm IPQ4019 USB PHY driver"
+ depends on PHY && ARCH_IPQ40XX
+ help
+ Support for the USB PHY-s on Qualcomm IPQ40xx SoC-s.
diff --git a/drivers/phy/qcom/Makefile b/drivers/phy/qcom/Makefile
new file mode 100644
index 0000000..4a340e3
--- /dev/null
+++ b/drivers/phy/qcom/Makefile
@@ -0,0 +1,2 @@
+obj-$(CONFIG_PHY_QCOM_IPQ4019_USB) += phy-qcom-ipq4019-usb.o
+obj-$(CONFIG_MSM8916_USB_PHY) += msm8916-usbh-phy.o
diff --git a/drivers/phy/qcom/msm8916-usbh-phy.c b/drivers/phy/qcom/msm8916-usbh-phy.c
new file mode 100644
index 0000000..7c9d030
--- /dev/null
+++ b/drivers/phy/qcom/msm8916-usbh-phy.c
@@ -0,0 +1,110 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Ramon Fried <ramon.fried@gmail.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <generic-phy.h>
+#include <linux/bitops.h>
+#include <usb/ehci-ci.h>
+#include <usb/ulpi.h>
+#include <asm/io.h>
+
+/* PHY viewport regs */
+#define ULPI_MISC_A_READ 0x96
+#define ULPI_MISC_A_SET 0x97
+#define ULPI_MISC_A_CLEAR 0x98
+#define ULPI_MISC_A_VBUSVLDEXT BIT(0)
+#define ULPI_MISC_A_VBUSVLDEXTSEL BIT(1)
+#define GEN2_SESS_VLD_CTRL_EN BIT(7)
+#define SESS_VLD_CTRL BIT(25)
+
+struct msm_phy_priv {
+ void __iomem *regs;
+ struct usb_ehci *ehci; /* Start of IP core*/
+ struct ulpi_viewport ulpi_vp; /* ULPI Viewport */
+};
+
+static int msm_phy_power_on(struct phy *phy)
+{
+ struct msm_phy_priv *priv = dev_get_priv(phy->dev);
+
+ /* Select and enable external configuration with USB PHY */
+ ulpi_write(&priv->ulpi_vp, (u8 *)ULPI_MISC_A_SET,
+ ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT);
+
+ return 0;
+}
+
+static int msm_phy_power_off(struct phy *phy)
+{
+ struct msm_phy_priv *priv = dev_get_priv(phy->dev);
+
+ /* Disable VBUS mimicing in the controller. */
+ ulpi_write(&priv->ulpi_vp, (u8 *)ULPI_MISC_A_CLEAR,
+ ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT);
+ return 0;
+}
+
+static int msm_phy_reset(struct phy *phy)
+{
+ struct msm_phy_priv *p = dev_get_priv(phy->dev);
+
+ /* select ULPI phy */
+ writel(PORT_PTS_ULPI, &p->ehci->portsc);
+
+ /* Enable sess_vld */
+ setbits_le32(&p->ehci->genconfig2, GEN2_SESS_VLD_CTRL_EN);
+
+ /* Enable external vbus configuration in the LINK */
+ setbits_le32(&p->ehci->usbcmd, SESS_VLD_CTRL);
+
+ /* USB_OTG_HS_AHB_BURST */
+ writel(0x0, &p->ehci->sbuscfg);
+
+ /* USB_OTG_HS_AHB_MODE: HPROT_MODE */
+ /* Bus access related config. */
+ writel(0x08, &p->ehci->sbusmode);
+
+ return 0;
+}
+
+static int msm_phy_probe(struct udevice *dev)
+{
+ struct msm_phy_priv *priv = dev_get_priv(dev);
+
+ priv->regs = dev_remap_addr(dev);
+ if (!priv->regs)
+ return -EINVAL;
+
+ priv->ehci = (struct usb_ehci *)priv->regs;
+ priv->ulpi_vp.port_num = 0;
+
+ /* Warning: this will not work if viewport address is > 64 bit due to
+ * ULPI design.
+ */
+ priv->ulpi_vp.viewport_addr = (phys_addr_t)&priv->ehci->ulpi_viewpoint;
+
+ return 0;
+}
+
+static struct phy_ops msm_phy_ops = {
+ .power_on = msm_phy_power_on,
+ .power_off = msm_phy_power_off,
+ .reset = msm_phy_reset,
+};
+
+static const struct udevice_id msm_phy_ids[] = {
+ { .compatible = "qcom,apq8016-usbphy" },
+ { }
+};
+
+U_BOOT_DRIVER(msm8916_usbphy) = {
+ .name = "msm8916_usbphy",
+ .id = UCLASS_PHY,
+ .of_match = msm_phy_ids,
+ .ops = &msm_phy_ops,
+ .probe = msm_phy_probe,
+ .priv_auto = sizeof(struct msm_phy_priv),
+};
diff --git a/drivers/phy/qcom/phy-qcom-ipq4019-usb.c b/drivers/phy/qcom/phy-qcom-ipq4019-usb.c
new file mode 100644
index 0000000..5808489
--- /dev/null
+++ b/drivers/phy/qcom/phy-qcom-ipq4019-usb.c
@@ -0,0 +1,145 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Sartura Ltd.
+ *
+ * Author: Robert Marko <robert.marko@sartura.hr>
+ *
+ * Based on Linux driver
+ */
+
+#include <clk.h>
+#include <common.h>
+#include <dm.h>
+#include <generic-phy.h>
+#include <log.h>
+#include <reset.h>
+#include <asm/io.h>
+#include <linux/delay.h>
+
+struct ipq4019_usb_phy {
+ phys_addr_t base;
+ struct reset_ctl por_rst;
+ struct reset_ctl srif_rst;
+};
+
+static int ipq4019_ss_phy_power_off(struct phy *_phy)
+{
+ struct ipq4019_usb_phy *phy = dev_get_priv(_phy->dev);
+
+ reset_assert(&phy->por_rst);
+ mdelay(10);
+
+ return 0;
+}
+
+static int ipq4019_ss_phy_power_on(struct phy *_phy)
+{
+ struct ipq4019_usb_phy *phy = dev_get_priv(_phy->dev);
+
+ ipq4019_ss_phy_power_off(_phy);
+
+ reset_deassert(&phy->por_rst);
+
+ return 0;
+}
+
+static struct phy_ops ipq4019_usb_ss_phy_ops = {
+ .power_on = ipq4019_ss_phy_power_on,
+ .power_off = ipq4019_ss_phy_power_off,
+};
+
+static int ipq4019_usb_ss_phy_probe(struct udevice *dev)
+{
+ struct ipq4019_usb_phy *phy = dev_get_priv(dev);
+ int ret;
+
+ phy->base = dev_read_addr(dev);
+ if (phy->base == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ ret = reset_get_by_name(dev, "por_rst", &phy->por_rst);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+static const struct udevice_id ipq4019_usb_ss_phy_ids[] = {
+ { .compatible = "qcom,usb-ss-ipq4019-phy" },
+ { }
+};
+
+U_BOOT_DRIVER(ipq4019_usb_ss_phy) = {
+ .name = "ipq4019-usb-ss-phy",
+ .id = UCLASS_PHY,
+ .of_match = ipq4019_usb_ss_phy_ids,
+ .ops = &ipq4019_usb_ss_phy_ops,
+ .probe = ipq4019_usb_ss_phy_probe,
+ .priv_auto = sizeof(struct ipq4019_usb_phy),
+};
+
+static int ipq4019_hs_phy_power_off(struct phy *_phy)
+{
+ struct ipq4019_usb_phy *phy = dev_get_priv(_phy->dev);
+
+ reset_assert(&phy->por_rst);
+ mdelay(10);
+
+ reset_assert(&phy->srif_rst);
+ mdelay(10);
+
+ return 0;
+}
+
+static int ipq4019_hs_phy_power_on(struct phy *_phy)
+{
+ struct ipq4019_usb_phy *phy = dev_get_priv(_phy->dev);
+
+ ipq4019_hs_phy_power_off(_phy);
+
+ reset_deassert(&phy->srif_rst);
+ mdelay(10);
+
+ reset_deassert(&phy->por_rst);
+
+ return 0;
+}
+
+static struct phy_ops ipq4019_usb_hs_phy_ops = {
+ .power_on = ipq4019_hs_phy_power_on,
+ .power_off = ipq4019_hs_phy_power_off,
+};
+
+static int ipq4019_usb_hs_phy_probe(struct udevice *dev)
+{
+ struct ipq4019_usb_phy *phy = dev_get_priv(dev);
+ int ret;
+
+ phy->base = dev_read_addr(dev);
+ if (phy->base == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ ret = reset_get_by_name(dev, "por_rst", &phy->por_rst);
+ if (ret)
+ return ret;
+
+ ret = reset_get_by_name(dev, "srif_rst", &phy->srif_rst);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+static const struct udevice_id ipq4019_usb_hs_phy_ids[] = {
+ { .compatible = "qcom,usb-hs-ipq4019-phy" },
+ { }
+};
+
+U_BOOT_DRIVER(ipq4019_usb_hs_phy) = {
+ .name = "ipq4019-usb-hs-phy",
+ .id = UCLASS_PHY,
+ .of_match = ipq4019_usb_hs_phy_ids,
+ .ops = &ipq4019_usb_hs_phy_ops,
+ .probe = ipq4019_usb_hs_phy_probe,
+ .priv_auto = sizeof(struct ipq4019_usb_phy),
+};