tree 433500e57617ee3db4654681791c92d5cf03c212
parent 2bbe75ac6bbd977b5db481fb625639a9da928f1d
author Paul Barker <paul.barker.ct@bp.renesas.com> 1709066428 +0000
committer Marek Vasut <marek.vasut+renesas@mailbox.org> 1709142147 +0100

clk: renesas: Confirm all clock & reset changes on RZ/G2L

When enabling/disabling a clock or reset signal, confirm that the change
has completed before returning from the function. A somewhat arbitrary
100ms timeout is defined to ensure that the system doesn't lock up in
the case of an error.

Since we need to dynamically determine if we're waiting for a 0 bit or a
1 bit, it's easier to use wait_for_bit_32() than readl_poll_timeout().

This change is needed for reliable initialization of the I2C driver
which is added in a following patch.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>