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git01.mediatek.com / filogic / uboot / 2e83487171a7d1ebce20cb15ca9fb3c0d9cd6cd7 / . / arch / arm / mach-socfpga / include / mach
tree: 8ea6cb6f48aa479f6737b4d5f1b42017c3d311b1 [path history] [tgz]
  1. base_addr_a10.h
  2. base_addr_ac5.h
  3. base_addr_soc64.h
  4. boot0.h
  5. clock_manager.h
  6. clock_manager_agilex.h
  7. clock_manager_agilex5.h
  8. clock_manager_arria10.h
  9. clock_manager_gen5.h
  10. clock_manager_n5x.h
  11. clock_manager_s10.h
  12. clock_manager_soc64.h
  13. firewall.h
  14. fpga_manager.h
  15. fpga_manager_arria10.h
  16. fpga_manager_gen5.h
  17. freeze_controller.h
  18. gpio.h
  19. handoff_soc64.h
  20. mailbox_s10.h
  21. misc.h
  22. nic301.h
  23. pinmux.h
  24. reset_manager.h
  25. reset_manager_arria10.h
  26. reset_manager_gen5.h
  27. reset_manager_soc64.h
  28. scan_manager.h
  29. scu.h
  30. sdram.h
  31. sdram_arria10.h
  32. sdram_gen5.h
  33. secure_reg_helper.h
  34. secure_vab.h
  35. smc_api.h
  36. system_manager.h
  37. system_manager_arria10.h
  38. system_manager_gen5.h
  39. system_manager_soc64.h
  40. timer.h