| commit | 00a8fa36e4fa693b07bb1bc5d263000309f4cab5 | [log] [tgz] |
|---|---|---|
| author | Massimo Pegorer <massimo.pegorer+oss@gmail.com> | Thu Aug 03 13:08:11 2023 +0200 |
| committer | Kever Yang <kever.yang@rock-chips.com> | Sat Aug 12 10:37:57 2023 +0800 |
| tree | 3fcae2f77e2e2668f4e0f328a80448e03b7e1914 | |
| parent | fae9ae4372dc446dadc5f35f20303431ca3d676c [diff] |
clk: rockchip: rk3308: Fix ordering between masking and shifting As per definitions of masks and shift offsets in cru_rk3308.h, values read from registers must be first masked and then shifted. By the way, this fix is binary invariant, because in all of fixed cases the shift offset is zero. Signed-off-by: Massimo Pegorer <massimo.pegorer+oss@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>