commit 2d2e3ffa80237dc3f2d67b467c6c8aab265c6b64
author Marek Vasut <marek.vasut+renesas@gmail.com> Wed May 01 18:20:00 2019 +0200
committer Marek Vasut <marex@denx.de> Tue May 07 05:41:32 2019 +0200
tree ef46cdb71c278ebe58ad77989fb7c7e1116b6b19
parent 6be61c660cd8be85bcd32a90f7c690f47e4ad300

serial: sh: Add RZ/A1 support

Add support for RZ/A1 SoC specifics.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

drivers/serial/serial_sh.c

diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c
index e6fe5c7..8f52f9d 100644
--- a/drivers/serial/serial_sh.c
+++ b/drivers/serial/serial_sh.c
@@ -62,6 +62,9 @@
 	sci_out(port, SCFCR, SCFCR_RFRST|SCFCR_TFRST);
 	sci_in(port, SCFCR);
 	sci_out(port, SCFCR, 0);
+#if defined(CONFIG_RZA1)
+	sci_out(port, SCSPTR, 0x0003);
+#endif
 }
 
 static void

drivers/serial/serial_sh.h

diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h
index 887dd19..8aa80d4 100644
--- a/drivers/serial/serial_sh.h
+++ b/drivers/serial/serial_sh.h
@@ -195,7 +195,7 @@
 #  define SCSPTR7 0xfffeB820 /* 16 bit SCIF */
 # endif
 # define SCSCR_INIT(port)	0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
-#elif defined(CONFIG_CPU_SH7269)
+#elif defined(CONFIG_CPU_SH7269) || defined(CONFIG_RZA1)
 # define SCSPTR0 0xe8007020 /* 16 bit SCIF */
 # define SCSPTR1 0xe8007820 /* 16 bit SCIF */
 # define SCSPTR2 0xe8008020 /* 16 bit SCIF */
@@ -205,6 +205,7 @@
 # define SCSPTR6 0xe800a020 /* 16 bit SCIF */
 # define SCSPTR7 0xe800a820 /* 16 bit SCIF */
 # define SCSCR_INIT(port)	0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
+# define SCIF_ORER 0x0001  /* overrun error bit */
 #elif defined(CONFIG_CPU_SH7619)
 # define SCSPTR0 0xf8400020 /* 16 bit SCIF */
 # define SCSPTR1 0xf8410020 /* 16 bit SCIF */