tree 4ac4a8a0e5a6cdbaa449bccac100f14c758347e3
parent 3e9aa0b5a37b194b25e3c4ac60b0382f360db760
author Andre Przywara <andre.przywara@arm.com> 1651710343 +0100
committer Andre Przywara <andre.przywara@arm.com> 1653351375 +0100

clk: sunxi: add and use dummy gate clocks

Some devices enumerate various clocks in their DT, and many drivers
just blanketly try to enable all of them. This creates problems
since we only model a few gate clocks, and the clock driver outputs
a warning when a clock is not described:
=========
sunxi_set_gate: (CLK#3) unhandled
=========

Some clocks don't have an enable bit, or are already enabled in a
different way, so we might want to just ignore them.

Add a CCU_CLK_F_DUMMY_GATE flag that indicates that case, and define
a GATE_DUMMY macro that can be used in the clock description array.
Define a few clocks, used by some pinctrl devices, that way to suppress
the runtime warnings.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>