commit 29cd27196f900208848fe5200d2e3bbab954ace3
author Biwen Li <biwen.li@nxp.com> Fri May 01 20:04:21 2020 +0800
committer Priyanka Jain <priyanka.jain@nxp.com> Mon May 04 09:12:36 2020 +0530
tree d45a3d71f752a1ceec29b3dd22b90f9f999d8238
parent 826bceea999dfd298a8065e68a9fc3b1e30c272f

dm: powerpc: T1040/T1042: add i2c DM support

This supports i2c DM for SoC T1040/T1042

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

board/freescale/t1040qds/diu.c

diff --git a/board/freescale/t1040qds/diu.c b/board/freescale/t1040qds/diu.c
index ab9e922..0b1aeed 100644
--- a/board/freescale/t1040qds/diu.c
+++ b/board/freescale/t1040qds/diu.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2014 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  * Author: Priyanka Jain <Priyanka.Jain@freescale.com>
  */
 
@@ -48,7 +49,7 @@
 
 	/* Program HDMI encoder */
 	/* Switch channel to DIU */
-	select_i2c_ch_pca9547(I2C_MUX_CH_DIU);
+	select_i2c_ch_pca9547(I2C_MUX_CH_DIU, 0);
 
 	/* Set dispaly encoder */
 	ret = diu_set_dvi_encoder(temp);
@@ -58,7 +59,7 @@
 	}
 
 	/* Switch channel to default */
-	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
+	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
 
 	/* Program pixel clock */
 	out_be32((unsigned *)CONFIG_SYS_FSL_SCFG_PIXCLK_ADDR,

board/freescale/t1040qds/t1040qds.c

diff --git a/board/freescale/t1040qds/t1040qds.c b/board/freescale/t1040qds/t1040qds.c
index 92dd923..9e253fd 100644
--- a/board/freescale/t1040qds/t1040qds.c
+++ b/board/freescale/t1040qds/t1040qds.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2013 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  */
 
 #include <common.h>
@@ -79,11 +80,24 @@
 	return 0;
 }
 
-int select_i2c_ch_pca9547(u8 ch)
+int select_i2c_ch_pca9547(u8 ch, int bus_num)
 {
 	int ret;
 
+#ifdef CONFIG_DM_I2C
+	struct udevice *dev;
+
+	ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI, 1, &dev);
+	if (ret) {
+		printf("%s: Cannot find udev for a bus %d\n", __func__,
+		       bus_num);
+		return ret;
+	}
+
+	ret = dm_i2c_write(dev, 0, &ch, 1);
+#else
 	ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
+#endif
 	if (ret) {
 		puts("PCA: failed to select proper channel\n");
 		return ret;
@@ -154,7 +168,7 @@
 		MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
 		0, flash_esel, BOOKE_PAGESZ_256M, 1);
 #endif
-	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
+	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
 
 	return 0;
 }

board/freescale/t1040qds/t1040qds.h

diff --git a/board/freescale/t1040qds/t1040qds.h b/board/freescale/t1040qds/t1040qds.h
index d2f0203..781bcde 100644
--- a/board/freescale/t1040qds/t1040qds.h
+++ b/board/freescale/t1040qds/t1040qds.h
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2013 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  */
 
 #ifndef __T1040_QDS_H__
@@ -8,6 +9,6 @@
 
 void fdt_fixup_board_enet(void *blob);
 void pci_of_setup(void *blob, bd_t *bd);
-int select_i2c_ch_pca9547(u8 ch);
+int select_i2c_ch_pca9547(u8 ch, int bus_bum);
 
 #endif