tree 240c74dc848121f570ca7b96d49a1159d12ad9ff
parent f3035ca7e94d53ba9855a2c6fac4e14c97f9d200
author Tom Warren <twarren@nvidia.com> 1435003424 -0700
committer Tom Warren <twarren@nvidia.com> 1438813371 -0700

Tegra: clocks: Add 38.4MHz OSC support for T210 use

Added 38.4MHz/48MHz entries to pll_x_table for CPU PLL. Needs
to be measured - should be close to 700MHz (1.4G/2).

Note that some freqs aren't in the PLLU table in T210 TRM
(13, 26MHz), so I used the 12MHz table entry for them. They
shouldn't be selected since they're not viable T210 OSC freqs.

Since there are now 2 new OSC defines, all tables (pll_x_table,
PLLU) had to increase by two entries, but since 38.4/48MHz are
not viable osc freqs on T20/30/114, etc, they're just set to 0.

Signed-off-by: Tom Warren <twarren@nvidia.com>