tree 0e6f7a560fece41ed04cfdd3fad6591433c56e19
parent a3cd548f12dc01f0a06ac02026a3826feb314aae
author Alexey Brodkin <abrodkin@synopsys.com> 1427711764 +0300
committer Alexey Brodkin <abrodkin@synopsys.com> 1428043670 +0300

arc: add support for SLC (System Level Cache, AKA L2-cache)

ARCv2 cores may have built-in SLC (System Level Cache, AKA L2-cache).
This change adds functions required for controlling SLC:
 * slc_enable/disable
 * slc_flush/invalidate

For now we just disable SLC to escape DMA coherency issues until either:
 * SLC flush/invalidate is supported in DMA APIin U-Boot
 * hardware DMA coherency is implemented (that might be board specific
   so probably we'll need to have a separate Kconfig option for
   controlling SLC explicitly)

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>