diff --git a/board/bsh/imx6ulz_smm_m2/Kconfig b/board/bsh/imx6ulz_smm_m2/Kconfig
new file mode 100644
index 0000000..e38df7c
--- /dev/null
+++ b/board/bsh/imx6ulz_smm_m2/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_MX6ULZ_SMM_M2
+
+config SYS_BOARD
+	default "imx6ulz_smm_m2"
+
+config SYS_VENDOR
+	default "bsh"
+
+config SYS_CONFIG_NAME
+	default "imx6ulz_smm_m2"
+
+endif
diff --git a/board/bsh/imx6ulz_smm_m2/MAINTAINERS b/board/bsh/imx6ulz_smm_m2/MAINTAINERS
new file mode 100644
index 0000000..8f3d79d
--- /dev/null
+++ b/board/bsh/imx6ulz_smm_m2/MAINTAINERS
@@ -0,0 +1,6 @@
+MX6ULZ_SMM_M2 BOARD
+M:	Michael Trimarchi <michael@amarulasolutions.com>
+S:	Maintained
+F:	board/bsh/mx6ulz_smm_m2/
+F:	include/configs/imx6ulz_smm_m2.h
+F:	configs/imx6ulz_smm_m2_defconfig
diff --git a/board/bsh/imx6ulz_smm_m2/Makefile b/board/bsh/imx6ulz_smm_m2/Makefile
new file mode 100644
index 0000000..b761bbb
--- /dev/null
+++ b/board/bsh/imx6ulz_smm_m2/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+# (C) Copyright 2021 Amarula Solutions B.V.
+
+obj-y  := imx6ulz_smm_m2.o
+obj-$(CONFIG_SPL_BUILD) += spl.o
+
diff --git a/board/bsh/imx6ulz_smm_m2/README b/board/bsh/imx6ulz_smm_m2/README
new file mode 100644
index 0000000..03d0132
--- /dev/null
+++ b/board/bsh/imx6ulz_smm_m2/README
@@ -0,0 +1,67 @@
+How to Update U-Boot on imx6ulz_smm_m2 board
+--------------------------------------------
+
+Required software on the host PC:
+
+- UUU: https://github.com/NXPmicro/mfgtools
+
+Build U-Boot for m2:
+
+$ make mrproper
+$ make imx6ulz_smm_m2_defconfig
+$ make
+
+This generates the SPL and u-boot-dtb.img binaries.
+
+1. Loading U-Boot via USB Serial Download Protocol
+
+Copy SPL and u-boot-dtb.img to the uuu folder.
+
+Load the U-Boot via USB:
+
+$ sudo uuu -v -b nand_script.lst u-boot-with-spl.imx
+
+where nand_script.lst contains the following:
+
+uuu_version 1.2.39
+
+# @_flash.bin            | bootloader
+# @_image   [_flash.bin] | image burn to nand, default is the same as bootloader
+
+# This command will be run when i.MX6/7 i.MX8MM, i.MX8MQ
+SDP: boot -f _flash.bin
+
+# This command will be run when ROM support stream mode
+# i.MX8QXP, i.MX8QM
+SDPS: boot -f _flash.bin
+
+# These commands will be run when use SPL and will be skipped if no spl
+# SDPU will be deprecated. please use SDPV instead of SDPU
+# {
+SDPU: delay 1000
+SDPU: write -f _flash.bin -offset 0x57c00
+SDPU: jump
+# }
+
+# These commands will be run when use SPL and will be skipped if no spl
+# if (SPL support SDPV)
+# {
+SDPV: delay 1000
+SDPV: write -f _flash.bin -offset 0x11000
+SDPV: jump
+# }
+
+FB: ucmd setenv fastboot_buffer ${loadaddr}
+FB: download -f _image
+FB: ucmd if test ! -n "$fastboot_bytes"; then setenv fastboot_bytes $filesize; else true; fi
+# Burn image to nandfit partition if needed
+FB: ucmd if env exists nandfit_part; then nand erase.part nandfit; nand write ${fastboot_buffer} nandfit ${fastboot_bytes}; else true; fi;
+FB: ucmd nandbcb init ${fastboot_buffer} nandboot ${fastboot_bytes}
+FB: Done
+
+Then U-Boot starts and its messages appear in the console program.
+
+Use the default environment variables:
+
+=> env default -f -a
+=> saveenv
diff --git a/board/bsh/imx6ulz_smm_m2/imx6ulz_smm_m2.c b/board/bsh/imx6ulz_smm_m2/imx6ulz_smm_m2.c
new file mode 100644
index 0000000..c82eabb
--- /dev/null
+++ b/board/bsh/imx6ulz_smm_m2/imx6ulz_smm_m2.c
@@ -0,0 +1,53 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ *
+ * Copyright (C) 2021 BSH Hausgeraete GmbH
+ */
+
+#include <init.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/iomux.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/crm_regs.h>
+#include <asm/arch/mx6-pins.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/mach-imx/boot_mode.h>
+#include <asm/global_data.h>
+#include <asm/gpio.h>
+#include <common.h>
+#include <env.h>
+#include <linux/sizes.h>
+
+static void setup_gpmi_nand(void)
+{
+	setup_gpmi_io_clk((MXC_CCM_CS2CDR_ENFC_CLK_PODF(0) |
+			   MXC_CCM_CS2CDR_ENFC_CLK_PRED(3) |
+			   MXC_CCM_CS2CDR_ENFC_CLK_SEL(3)));
+};
+
+int dram_init(void)
+{
+	gd->ram_size = imx_ddr_size();
+
+	return 0;
+}
+
+int board_init(void)
+{
+	/* Address of boot parameters */
+	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+
+	setup_gpmi_nand();
+
+	return 0;
+}
+
+int board_late_init(void)
+{
+	if (is_boot_from_usb()) {
+		env_set("bootcmd", "run bootcmd_mfg");
+		env_set("bootdelay", "0");
+	}
+
+	return 0;
+}
diff --git a/board/bsh/imx6ulz_smm_m2/spl.c b/board/bsh/imx6ulz_smm_m2/spl.c
new file mode 100644
index 0000000..5b4812e
--- /dev/null
+++ b/board/bsh/imx6ulz_smm_m2/spl.c
@@ -0,0 +1,130 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include <common.h>
+#include <cpu_func.h>
+#include <hang.h>
+#include <init.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/iomux.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/crm_regs.h>
+#include <asm/arch/mx6ull_pins.h>
+#include <asm/arch/mx6-pins.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/gpio.h>
+#include <asm/mach-imx/iomux-v3.h>
+#include <asm/mach-imx/boot_mode.h>
+#include <linux/libfdt.h>
+#include <spl.h>
+#include <asm/arch/mx6-ddr.h>
+
+#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
+		       PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
+		       PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+
+static const iomux_v3_cfg_t uart4_pads[] = {
+	MX6_PAD_UART4_TX_DATA__UART4_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
+	MX6_PAD_UART4_RX_DATA__UART4_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
+};
+
+static void setup_iomux_uart(void)
+{
+	imx_iomux_v3_setup_multiple_pads(uart4_pads, ARRAY_SIZE(uart4_pads));
+}
+
+static struct mx6ul_iomux_grp_regs mx6_grp_ioregs = {
+	.grp_addds		= 0x00000028,
+	.grp_ddrmode_ctl	= 0x00020000,
+	.grp_b0ds		= 0x00000028,
+	.grp_ctlds		= 0x00000028,
+	.grp_b1ds		= 0x00000028,
+	.grp_ddrpke		= 0x00000000,
+	.grp_ddrmode		= 0x00020000,
+	.grp_ddr_type		= 0x000c0000,
+};
+
+static struct mx6ul_iomux_ddr_regs mx6_ddr_ioregs = {
+	.dram_dqm0		= 0x00000028,
+	.dram_dqm1		= 0x00000028,
+	.dram_ras		= 0x00000028,
+	.dram_cas		= 0x00000028,
+	.dram_odt0		= 0x00000028,
+	.dram_odt1		= 0x00000028,
+	.dram_sdba2		= 0x00000000,
+	.dram_sdclk_0		= 0x00000028,
+	.dram_sdqs0		= 0x00000028,
+	.dram_sdqs1		= 0x00000028,
+	.dram_reset		= 0x000c0028,
+};
+
+static struct mx6_mmdc_calibration mx6_mmcd_calib = {
+	.p0_mpwldectrl0		= 0x00000000,
+	.p0_mpwldectrl1		= 0x00100010,
+	.p0_mpdgctrl0		= 0x414c014c,
+	.p0_mpdgctrl1		= 0x00000000,
+	.p0_mprddlctl		= 0x40403a42,
+	.p0_mpwrdlctl		= 0x4040342e,
+};
+
+static struct mx6_ddr_sysinfo ddr_sysinfo = {
+	.dsize			= 0,
+	.cs1_mirror		= 0,
+	.cs_density		= 32,
+	.ncs			= 1,
+	.bi_on			= 1,
+	.rtt_nom		= 1,
+	.rtt_wr			= 0,
+	.ralat			= 5,
+	.walat			= 1,
+	.mif3_mode		= 3,
+	.rst_to_cke		= 0x23,	/* 33 cycles (JEDEC value for DDR3) - total of 500 us */
+	.sde_to_rst		= 0x10,	/* 14 cycles (JEDEC value for DDR3) - total of 200 us */
+	.refsel			= 1,
+	.refr			= 3,
+};
+
+static struct mx6_ddr3_cfg mem_ddr = {
+	.mem_speed		= 1333,
+	.density		= 2,
+	.width			= 16,
+	.banks			= 8,
+	.rowaddr		= 13,
+	.coladdr		= 10,
+	.pagesz			= 2,
+	.trcd			= 1350,
+	.trcmin			= 4950,
+	.trasmin		= 3600,
+};
+
+static void ccgr_init(void)
+{
+	struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+
+	writel(0xFFFFFFFF, &ccm->CCGR0);
+	writel(0xFFFFFFFF, &ccm->CCGR1);
+	writel(0xFFFFFFFF, &ccm->CCGR2);
+	writel(0xFFFFFFFF, &ccm->CCGR3);
+	writel(0xFFFFFFFF, &ccm->CCGR4);
+	writel(0xFFFFFFFF, &ccm->CCGR5);
+	writel(0xFFFFFFFF, &ccm->CCGR6);
+}
+
+static void imx6ul_spl_dram_cfg(void)
+{
+	mx6ul_dram_iocfg(mem_ddr.width, &mx6_ddr_ioregs, &mx6_grp_ioregs);
+	mx6_dram_cfg(&ddr_sysinfo, &mx6_mmcd_calib, &mem_ddr);
+}
+
+void board_init_f(ulong dummy)
+{
+	ccgr_init();
+	arch_cpu_init();
+	timer_init();
+	setup_iomux_uart();
+	preloader_console_init();
+	imx6ul_spl_dram_cfg();
+}
+
+void reset_cpu(void)
+{
+}