tree 8527028fdb7090228acf5d252d18e9346b0e80ba
parent fdebed82ade393eff958993e9b4293cb3243caec
author Bin Meng <bmeng.cn@gmail.com> 1436948618 +0800
committer Simon Glass <sjg@chromium.org> 1438101382 -0600

x86: Change pci option rom area MTRR setting to cacheable

Turn on cache on the pci option rom area to improve the performance.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>