arm: mvebu: Add support for specifying VHV_Enable GPIO
VHV_Enable GPIO is required to enable during eFuse programming on Armada
SoCs not from 3700 family. Add support for enabling and disabling VHV pin
via GPIO during eFuse programming, when specified.
All details are in Marvell AN-389: ARMADA VHV Power document
(Doc. No. MV-S302545-00 Rev. C, August 2, 2016).
Note that due to HW Errata 3.6 eFuse erroneous burning (Ref #: HWE-3718342)
VHV power must be disabled while core voltage is off to prevent erroneous
eFuse programming.
This is specified in Marvell ARMADA 380/385/388 Functional Errata,
Guidelines, and Restrictions document
(Doc. No. MV-S501377-00 Rev. D, December 1, 2016).
Signed-off-by: Pali Rohár <pali@kernel.org>
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 2ebe341..fe6b785 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -348,6 +348,21 @@
from a memory block.
This is can be used for testing prog scripts.
+config MVEBU_EFUSE_VHV_GPIO
+ string "VHV_Enable GPIO name for eFuse programming"
+ depends on MVEBU_EFUSE && !ARMADA_3700
+ help
+ The eFuse programing (burning) phase requires supplying 1.8V to the
+ device on the VHV power pin, while for normal operation the VHV power
+ rail must be left unconnected. See Marvell AN-389: ARMADA VHV Power
+ document (Doc. No. MV-S302545-00 Rev. C, August 2, 2016) for details.
+ .
+ This specify VHV_Enable GPIO name used in U-Boot for enabling VHV power.
+
+config MVEBU_EFUSE_VHV_GPIO_ACTIVE_LOW
+ bool "VHV_Enable GPIO is Active Low"
+ depends on MVEBU_EFUSE_VHV_GPIO != ""
+
config SECURED_MODE_IMAGE
bool "Build image for trusted boot"
default false
diff --git a/arch/arm/mach-mvebu/efuse.c b/arch/arm/mach-mvebu/efuse.c
index 4b04337..be5dc0e 100644
--- a/arch/arm/mach-mvebu/efuse.c
+++ b/arch/arm/mach-mvebu/efuse.c
@@ -10,6 +10,7 @@
#include <asm/arch/cpu.h>
#include <asm/arch/efuse.h>
#include <asm/arch/soc.h>
+#include <asm/gpio.h>
#include <linux/bitops.h>
#include <linux/delay.h>
#include <linux/mbus.h>
@@ -56,17 +57,48 @@
return efuses + nr;
}
-static void enable_efuse_program(void)
+#ifndef DRY_RUN
+static int vhv_gpio;
+#endif
+
+static int enable_efuse_program(void)
{
#ifndef DRY_RUN
+ if (CONFIG_MVEBU_EFUSE_VHV_GPIO[0]) {
+ if (gpio_lookup_name(CONFIG_MVEBU_EFUSE_VHV_GPIO, NULL, NULL, &vhv_gpio)) {
+ printf("Error: VHV gpio lookup failed\n");
+ return -EOPNOTSUPP;
+ }
+ if (gpio_request(vhv_gpio, CONFIG_MVEBU_EFUSE_VHV_GPIO)) {
+ printf("Error: VHV gpio request failed\n");
+ return -EOPNOTSUPP;
+ }
+ if (gpio_direction_output(vhv_gpio,
+ IS_ENABLED(CONFIG_MVEBU_EFUSE_VHV_GPIO_ACTIVE_LOW) ? 0 : 1)) {
+ printf("Error: VHV gpio enable failed\n");
+ return -EINVAL;
+ }
+ mdelay(5); /* Wait for the VHV power to stabilize */
+ }
+
setbits_le32(MVEBU_EFUSE_CONTROL, MVEBU_EFUSE_CTRL_PROGRAM_ENABLE);
#endif
+
+ return 0;
}
static void disable_efuse_program(void)
{
#ifndef DRY_RUN
clrbits_le32(MVEBU_EFUSE_CONTROL, MVEBU_EFUSE_CTRL_PROGRAM_ENABLE);
+
+ if (CONFIG_MVEBU_EFUSE_VHV_GPIO[0]) {
+ if (gpio_direction_output(vhv_gpio,
+ IS_ENABLED(CONFIG_MVEBU_EFUSE_VHV_GPIO_ACTIVE_LOW) ? 1 : 0))
+ printf("Error: VHV gpio disable failed\n");
+ gpio_free(vhv_gpio);
+ vhv_gpio = 0;
+ }
#endif
}
@@ -123,7 +155,9 @@
if (!new_val->dwords.d[0] && !new_val->dwords.d[1] && (mask0 | mask1))
return 0;
- enable_efuse_program();
+ res = enable_efuse_program();
+ if (res)
+ return res;
res = do_prog_efuse(efuse, new_val, mask0, mask1);
@@ -155,7 +189,9 @@
if (val == (line[word] & val))
return 0;
- enable_efuse_program();
+ res = enable_efuse_program();
+ if (res)
+ return res;
mvebu_read_ld_efuse(ld1, line);
line[word] |= val;