| commit | f3d0382c7ba6426fc3c2b5f188e478b736c80770 | [log] [tgz] |
|---|---|---|
| author | Dinesh Maniyam <dinesh.maniyam@intel.com> | Thu Feb 27 00:18:15 2025 +0800 |
| committer | Michael Trimarchi <michael@amarulasolutions.com> | Sat Mar 15 10:35:00 2025 +0100 |
| tree | 837d6be997c2da0a76b1c7d49cbebe5244b7168f | |
| parent | f917713bf763d09afafe9ceebf7240e2218658bb [diff] |
dt: nand: add cadence nand dt-bindings The Cadence NAND is a configurable mtd raw block which supports multiple options for chipsets, clocking and reset structure, and feature list. Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>