net: ravb: Add tx/rx delay flag checks and support for rgmii-rxid
Some boards like the Beacon RZ/G2 SOM use either flags for
tx-internal-delay-ps, rx-internal-delay-ps or rgmii-rxid.
In Linux the APSR_RDM flag is set when either rx-internal-delay-ps
is set or the mode is rgmii-rxid, and the APSR_TDM is set when
tx-internal-delay-ps is found or rgmii-txid is set, and both
are set if rgmii-id is set.
The ravb driver in U-Boot driver was missing rgmii-rxid support,
so add that support in a similar fashion to what is done in Linux.
Signed-off-by: Adam Ford <aford173@gmail.com>
diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c
index 1d1118c..4078d33 100644
--- a/drivers/net/ravb.c
+++ b/drivers/net/ravb.c
@@ -52,6 +52,7 @@
#define CSR_OPS 0x0000000F
#define CSR_OPS_CONFIG BIT(1)
+#define APSR_RDM BIT(13)
#define APSR_TDM BIT(14)
#define TCCR_TSRQ0 BIT(0)
@@ -376,6 +377,9 @@
struct ravb_priv *eth = dev_get_priv(dev);
struct eth_pdata *pdata = dev_get_plat(dev);
int ret = 0;
+ int mode = 0;
+ unsigned int delay;
+ bool explicit_delay = false;
/* Set CONFIG mode */
ret = ravb_reset(dev);
@@ -402,9 +406,33 @@
(rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77995))
return 0;
- if ((pdata->phy_interface == PHY_INTERFACE_MODE_RGMII_ID) ||
- (pdata->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID))
- writel(APSR_TDM, eth->iobase + RAVB_REG_APSR);
+ if (!dev_read_u32(dev, "rx-internal-delay-ps", &delay)) {
+ /* Valid values are 0 and 1800, according to DT bindings */
+ if (delay) {
+ mode |= APSR_RDM;
+ explicit_delay = true;
+ }
+ }
+
+ if (!dev_read_u32(dev, "tx-internal-delay-ps", &delay)) {
+ /* Valid values are 0 and 2000, according to DT bindings */
+ if (delay) {
+ mode |= APSR_TDM;
+ explicit_delay = true;
+ }
+ }
+
+ if (!explicit_delay) {
+ if (pdata->phy_interface == PHY_INTERFACE_MODE_RGMII_ID ||
+ pdata->phy_interface == PHY_INTERFACE_MODE_RGMII_RXID)
+ mode |= APSR_RDM;
+
+ if (pdata->phy_interface == PHY_INTERFACE_MODE_RGMII_ID ||
+ pdata->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID)
+ mode |= APSR_TDM;
+ }
+
+ writel(mode, eth->iobase + RAVB_REG_APSR);
return 0;
}