commit 252b4a3ada20bb3e08ffc2572305812f14d0a8ad
author Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Tue Mar 01 09:16:51 2022 +0100
committer Michal Simek <michal.simek@xilinx.com> Wed Mar 09 12:36:37 2022 +0100
tree cbcc9fdcde0562c7b70f01a0a351b7389073e999
parent bdeeb2baf05631a38b804ab91297f517efd3ffe5

i2c: i2c-cdns: Fix write transaction state

Start write transfer after loading data to FIFO.

Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/f0b3e443daa7758e00dfdcc245cf6b2120b0e907.1646122610.git.michal.simek@xilinx.com

drivers/i2c/i2c-cdns.c

diff --git a/drivers/i2c/i2c-cdns.c b/drivers/i2c/i2c-cdns.c
index 5736afb..07d53be 100644
--- a/drivers/i2c/i2c-cdns.c
+++ b/drivers/i2c/i2c-cdns.c
@@ -251,6 +251,7 @@
 	u8 *cur_data = data;
 	struct cdns_i2c_regs *regs = i2c_bus->regs;
 	u32 ret;
+	bool start = 1;
 
 	/* Set the controller in Master transmit mode and clear FIFO */
 	setbits_le32(&regs->control, CDNS_I2C_CONTROL_CLR_FIFO);
@@ -269,6 +270,11 @@
 
 	while (len-- && !is_arbitration_lost(regs)) {
 		writel(*(cur_data++), &regs->data);
+		/* Trigger write only after loading data */
+		if (start) {
+			writel(addr, &regs->address);
+			start = 0;
+		}
 		if (len && readl(&regs->transfer_size) == CDNS_I2C_FIFO_DEPTH) {
 			ret = cdns_i2c_wait(regs, CDNS_I2C_INTERRUPT_COMP |
 					    CDNS_I2C_INTERRUPT_ARBLOST);