clk: clk_stm32: Add .set_rate callback
Since 'commit f4fcba5c5baa ("clk: implement clk_set_defaults()")'
STM32F4 family board can't boot.
Above patch calls clk_set_rate() for all nodes with assigned-clock-rates
property. Clock driver for STM32F family doesn't implement .set_rate
callback which make clk_set_defaults() exit on error and prevent board
to boot.
Fixes: f4fcba5c5baa ("clk: implement clk_set_defaults()")
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
diff --git a/drivers/clk/clk_stm32f.c b/drivers/clk/clk_stm32f.c
index 06827fe..926b249 100644
--- a/drivers/clk/clk_stm32f.c
+++ b/drivers/clk/clk_stm32f.c
@@ -337,6 +337,11 @@
}
}
+static ulong stm32_set_rate(struct clk *clk, ulong rate)
+{
+ return 0;
+}
+
static int stm32_clk_enable(struct clk *clk)
{
struct stm32_clk *priv = dev_get_priv(clk->dev);
@@ -464,6 +469,7 @@
.of_xlate = stm32_clk_of_xlate,
.enable = stm32_clk_enable,
.get_rate = stm32_clk_get_rate,
+ .set_rate = stm32_set_rate,
};
U_BOOT_DRIVER(stm32fx_clk) = {