riscv: Rename Andes cpu and board names
The current ae350-related defconfigs could also
support newer Andes CPU IP, so modify the names of CPU
from ax25 to andesv5, and board name from ax25-ae350 to ae350.
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index ebc4bef..48ca4ff 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -8,8 +8,8 @@
prompt "Target select"
optional
-config TARGET_AX25_AE350
- bool "Support ax25-ae350"
+config TARGET_AE350
+ bool "Support ae350"
config TARGET_MICROCHIP_ICICLE
bool "Support Microchip PolarFire-SoC Icicle Board"
@@ -58,7 +58,7 @@
Do not enable data cache in SPL.
# board-specific options below
-source "board/AndesTech/ax25-ae350/Kconfig"
+source "board/AndesTech/ae350/Kconfig"
source "board/emulation/qemu-riscv/Kconfig"
source "board/microchip/mpfs_icicle/Kconfig"
source "board/sifive/unleashed/Kconfig"
@@ -67,7 +67,7 @@
source "board/sipeed/maix/Kconfig"
# platform-specific options below
-source "arch/riscv/cpu/ax25/Kconfig"
+source "arch/riscv/cpu/andesv5/Kconfig"
source "arch/riscv/cpu/fu540/Kconfig"
source "arch/riscv/cpu/fu740/Kconfig"
source "arch/riscv/cpu/generic/Kconfig"
diff --git a/arch/riscv/cpu/ax25/Kconfig b/arch/riscv/cpu/andesv5/Kconfig
similarity index 100%
rename from arch/riscv/cpu/ax25/Kconfig
rename to arch/riscv/cpu/andesv5/Kconfig
diff --git a/arch/riscv/cpu/ax25/Makefile b/arch/riscv/cpu/andesv5/Makefile
similarity index 100%
rename from arch/riscv/cpu/ax25/Makefile
rename to arch/riscv/cpu/andesv5/Makefile
diff --git a/arch/riscv/cpu/ax25/cache.c b/arch/riscv/cpu/andesv5/cache.c
similarity index 100%
rename from arch/riscv/cpu/ax25/cache.c
rename to arch/riscv/cpu/andesv5/cache.c
diff --git a/arch/riscv/cpu/ax25/cpu.c b/arch/riscv/cpu/andesv5/cpu.c
similarity index 100%
rename from arch/riscv/cpu/ax25/cpu.c
rename to arch/riscv/cpu/andesv5/cpu.c
diff --git a/arch/riscv/cpu/ax25/spl.c b/arch/riscv/cpu/andesv5/spl.c
similarity index 100%
rename from arch/riscv/cpu/ax25/spl.c
rename to arch/riscv/cpu/andesv5/spl.c
diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile
index 5c15a0f..c576c55 100644
--- a/arch/riscv/dts/Makefile
+++ b/arch/riscv/dts/Makefile
@@ -1,6 +1,6 @@
# SPDX-License-Identifier: GPL-2.0+
-dtb-$(CONFIG_TARGET_AX25_AE350) += ae350_32.dtb ae350_64.dtb
+dtb-$(CONFIG_TARGET_AE350) += ae350_32.dtb ae350_64.dtb
dtb-$(CONFIG_TARGET_MICROCHIP_ICICLE) += microchip-mpfs-icicle-kit.dtb
dtb-$(CONFIG_TARGET_QEMU_VIRT) += qemu-virt32.dtb qemu-virt64.dtb
dtb-$(CONFIG_TARGET_OPENPITON_RISCV64) += openpiton-riscv64.dtb
diff --git a/board/AndesTech/ax25-ae350/Kconfig b/board/AndesTech/ae350/Kconfig
similarity index 87%
rename from board/AndesTech/ax25-ae350/Kconfig
rename to board/AndesTech/ae350/Kconfig
index 4bb33b0..75815bf 100644
--- a/board/AndesTech/ax25-ae350/Kconfig
+++ b/board/AndesTech/ae350/Kconfig
@@ -1,10 +1,10 @@
-if TARGET_AX25_AE350
+if TARGET_AE350
config SYS_CPU
- default "ax25"
+ default "andesv5"
config SYS_BOARD
- default "ax25-ae350"
+ default "ae350"
config SYS_VENDOR
default "AndesTech"
@@ -13,7 +13,7 @@
default "ae350"
config SYS_CONFIG_NAME
- default "ax25-ae350"
+ default "ae350"
config ENV_SIZE
default 0x2000 if ENV_IS_IN_SPI_FLASH
diff --git a/board/AndesTech/ax25-ae350/MAINTAINERS b/board/AndesTech/ae350/MAINTAINERS
similarity index 80%
rename from board/AndesTech/ax25-ae350/MAINTAINERS
rename to board/AndesTech/ae350/MAINTAINERS
index eebee16..ead8e0e 100644
--- a/board/AndesTech/ax25-ae350/MAINTAINERS
+++ b/board/AndesTech/ae350/MAINTAINERS
@@ -1,8 +1,8 @@
-AX25-AE350 BOARD
+AE350 BOARD
M: Rick Chen <rick@andestech.com>
S: Maintained
-F: board/AndesTech/ax25-ae350/
-F: include/configs/ax25-ae350.h
+F: board/AndesTech/ae350/
+F: include/configs/ae350.h
F: configs/ae350_rv32_defconfig
F: configs/ae350_rv64_defconfig
F: configs/ae350_rv32_xip_defconfig
diff --git a/board/AndesTech/ax25-ae350/Makefile b/board/AndesTech/ae350/Makefile
similarity index 87%
rename from board/AndesTech/ax25-ae350/Makefile
rename to board/AndesTech/ae350/Makefile
index 0e4ba8d..705ae43 100644
--- a/board/AndesTech/ax25-ae350/Makefile
+++ b/board/AndesTech/ae350/Makefile
@@ -3,4 +3,4 @@
# Copyright (C) 2017 Andes Technology Corporation.
# Rick Chen, Andes Technology Corporation <rick@andestech.com>
-obj-y := ax25-ae350.o
+obj-y := ae350.o
diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.c b/board/AndesTech/ae350/ae350.c
similarity index 100%
rename from board/AndesTech/ax25-ae350/ax25-ae350.c
rename to board/AndesTech/ae350/ae350.c
diff --git a/configs/ae350_rv32_defconfig b/configs/ae350_rv32_defconfig
index fd1bf5f..953cd07 100644
--- a/configs/ae350_rv32_defconfig
+++ b/configs/ae350_rv32_defconfig
@@ -6,7 +6,7 @@
CONFIG_DEFAULT_DEVICE_TREE="ae350_32"
CONFIG_SYS_PROMPT="RISC-V # "
CONFIG_SYS_LOAD_ADDR=0x100000
-CONFIG_TARGET_AX25_AE350=y
+CONFIG_TARGET_AE350=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffe80
diff --git a/configs/ae350_rv32_spl_defconfig b/configs/ae350_rv32_spl_defconfig
index 4d3623a..d61f7f5 100644
--- a/configs/ae350_rv32_spl_defconfig
+++ b/configs/ae350_rv32_spl_defconfig
@@ -8,7 +8,7 @@
CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x100000
-CONFIG_TARGET_AX25_AE350=y
+CONFIG_TARGET_AE350=y
CONFIG_RISCV_SMODE=y
# CONFIG_AVAILABLE_HARTS is not set
CONFIG_DISTRO_DEFAULTS=y
diff --git a/configs/ae350_rv32_spl_xip_defconfig b/configs/ae350_rv32_spl_xip_defconfig
index a076b77..e59ba0c 100644
--- a/configs/ae350_rv32_spl_xip_defconfig
+++ b/configs/ae350_rv32_spl_xip_defconfig
@@ -9,7 +9,7 @@
CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x100000
-CONFIG_TARGET_AX25_AE350=y
+CONFIG_TARGET_AE350=y
CONFIG_RISCV_SMODE=y
CONFIG_SPL_XIP=y
CONFIG_DISTRO_DEFAULTS=y
diff --git a/configs/ae350_rv32_xip_defconfig b/configs/ae350_rv32_xip_defconfig
index da1bd2b..9266321 100644
--- a/configs/ae350_rv32_xip_defconfig
+++ b/configs/ae350_rv32_xip_defconfig
@@ -6,7 +6,7 @@
CONFIG_DEFAULT_DEVICE_TREE="ae350_32"
CONFIG_SYS_PROMPT="RISC-V # "
CONFIG_SYS_LOAD_ADDR=0x100000
-CONFIG_TARGET_AX25_AE350=y
+CONFIG_TARGET_AE350=y
CONFIG_XIP=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
diff --git a/configs/ae350_rv64_defconfig b/configs/ae350_rv64_defconfig
index 9592581..3c18562 100644
--- a/configs/ae350_rv64_defconfig
+++ b/configs/ae350_rv64_defconfig
@@ -6,7 +6,7 @@
CONFIG_DEFAULT_DEVICE_TREE="ae350_64"
CONFIG_SYS_PROMPT="RISC-V # "
CONFIG_SYS_LOAD_ADDR=0x100000
-CONFIG_TARGET_AX25_AE350=y
+CONFIG_TARGET_AE350=y
CONFIG_ARCH_RV64I=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
diff --git a/configs/ae350_rv64_spl_defconfig b/configs/ae350_rv64_spl_defconfig
index 0217027..cb69514 100644
--- a/configs/ae350_rv64_spl_defconfig
+++ b/configs/ae350_rv64_spl_defconfig
@@ -8,7 +8,7 @@
CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x100000
-CONFIG_TARGET_AX25_AE350=y
+CONFIG_TARGET_AE350=y
CONFIG_ARCH_RV64I=y
CONFIG_RISCV_SMODE=y
# CONFIG_AVAILABLE_HARTS is not set
diff --git a/configs/ae350_rv64_spl_xip_defconfig b/configs/ae350_rv64_spl_xip_defconfig
index 5a1fa8b..e0773fa 100644
--- a/configs/ae350_rv64_spl_xip_defconfig
+++ b/configs/ae350_rv64_spl_xip_defconfig
@@ -9,7 +9,7 @@
CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x100000
-CONFIG_TARGET_AX25_AE350=y
+CONFIG_TARGET_AE350=y
CONFIG_ARCH_RV64I=y
CONFIG_RISCV_SMODE=y
CONFIG_SPL_XIP=y
diff --git a/configs/ae350_rv64_xip_defconfig b/configs/ae350_rv64_xip_defconfig
index c3fcbf3..0d467b9 100644
--- a/configs/ae350_rv64_xip_defconfig
+++ b/configs/ae350_rv64_xip_defconfig
@@ -6,7 +6,7 @@
CONFIG_DEFAULT_DEVICE_TREE="ae350_64"
CONFIG_SYS_PROMPT="RISC-V # "
CONFIG_SYS_LOAD_ADDR=0x100000
-CONFIG_TARGET_AX25_AE350=y
+CONFIG_TARGET_AE350=y
CONFIG_ARCH_RV64I=y
CONFIG_XIP=y
CONFIG_DISTRO_DEFAULTS=y
diff --git a/doc/board/AndesTech/ax25-ae350.rst b/doc/board/AndesTech/ae350.rst
similarity index 98%
rename from doc/board/AndesTech/ax25-ae350.rst
rename to doc/board/AndesTech/ae350.rst
index b46f427..42a2b4d 100644
--- a/doc/board/AndesTech/ax25-ae350.rst
+++ b/doc/board/AndesTech/ae350.rst
@@ -1,20 +1,20 @@
.. SPDX-License-Identifier: GPL-2.0+
-AX25-AE350
-==========
+AE350
+======
-AE350 is the mainline SoC produced by Andes Technology using AX25 CPU core
-base on RISC-V architecture.
+AE350 is the mainline SoC produced by Andes Technology using AndesV5 CPU core
+based on RISC-V architecture.
AE350 has integrated both AHB and APB bus and many periphals for application
and product development.
-AX25-AE350 is the SoC with AE350 hardcore CPU.
+AndesV5 is Andes CPU IP family that adopts RISC-V architecture.
-AX25 is Andes CPU IP to adopt RISC-V architecture.
+AndesV5 family includes 25, 27, 45 series.
-AX25 Features
--------------
+25-Series Features
+------------------
CPU Core
- 5-stage in-order execution pipeline
diff --git a/doc/board/AndesTech/index.rst b/doc/board/AndesTech/index.rst
index d8f7d15..cacc579 100644
--- a/doc/board/AndesTech/index.rst
+++ b/doc/board/AndesTech/index.rst
@@ -7,4 +7,4 @@
:maxdepth: 2
adp-ag101p
- ax25-ae350
+ ae350
diff --git a/include/configs/ax25-ae350.h b/include/configs/ae350.h
similarity index 100%
rename from include/configs/ax25-ae350.h
rename to include/configs/ae350.h