nds32: Support AG101P serial DM.
Support AG101P serial device tree flow.
Signed-off-by: rick <rick@andestech.com>
diff --git a/arch/nds32/dts/ag101p.dts b/arch/nds32/dts/ag101p.dts
new file mode 100644
index 0000000..2baa3dc
--- /dev/null
+++ b/arch/nds32/dts/ag101p.dts
@@ -0,0 +1,49 @@
+/dts-v1/;
+/ {
+ compatible = "nds32 ag101p";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&intc>;
+
+ aliases {
+ uart0 = &serial0;
+ } ;
+
+ chosen {
+ /* bootargs = "console=ttyS0,38400n8 earlyprintk=uart8250-32bit,0x99600000 debug bootmem_debug memblock=debug loglevel=7"; */
+ bootargs = "console=ttyS0,38400n8 earlyprintk=uart8250-32bit,0x99600000 debug loglevel=7";
+ stdout-path = "uart0:38400n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x40000000>;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu@0 {
+ compatible = "andestech,n13";
+ reg = <0>;
+ /* FIXME: to fill correct frqeuency */
+ clock-frequency = <60000000>;
+ };
+ };
+
+ intc: interrupt-controller {
+ compatible = "andestech,atnointc010";
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ };
+
+ serial0: serial@99600000 {
+ compatible = "andestech,uart16550", "ns16550a";
+ reg = <0x99600000 0x1000>;
+ interrupts = <7 4>;
+ clock-frequency = <14745600>;
+ reg-shift = <2>;
+ no-loopback-test = <1>;
+ };
+
+};