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filogic
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23529df1f5743e5ca61b1818d3663c4e709daa6a
/
.
/
board
/
renesas
/
ebisu
/
Makefile
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#
# board/renesas/ebisu/Makefile
#
# Copyright (C) 2018 Renesas Electronics Corporation
#
# SPDX-License-Identifier: GPL-2.0+
#
ifdef CONFIG_SPL_BUILD
obj
-
y
:=
../
rcar
-
common
/
gen3
-
spl
.
o
else
obj
-
y
:=
ebisu
.
o
../
rcar
-
common
/
common
.
o
endif