* Add support for PPChameleon Eval Board
* Add support for P3G4 board
* Fix problem with MGT5100 FEC driver: add "early" MAC address
initialization
diff --git a/board/evb64260/evb64260.c b/board/evb64260/evb64260.c
index 4f3032e..99717be 100644
--- a/board/evb64260/evb64260.c
+++ b/board/evb64260/evb64260.c
@@ -237,7 +237,7 @@
* on-board sram on the eval board, and updates the correct
* registers to boot from the sram. (device0)
*/
-#ifdef CONFIG_ZUMA_V2
+#if defined(CONFIG_ZUMA_V2) || defined(CONFIG_P3G4)
/* Zuma has no SRAM */
sram_boot = 0;
#else
@@ -265,6 +265,7 @@
GT_REG_WRITE(DEVICE_BANK2PARAMETERS, CFG_DEV2_PAR);
#endif
+#ifdef CONFIG_EVB64260
#ifdef CFG_32BIT_BOOT_PAR
/* detect if we are booting from the 32 bit flash */
if (GTREGREAD(DEVICE_BOOT_BANK_PARAMETERS) & (0x3 << 20)) {
@@ -280,6 +281,11 @@
/* 8 bit boot flash only */
GT_REG_WRITE(DEVICE_BOOT_BANK_PARAMETERS, CFG_8BIT_BOOT_PAR);
#endif
+#else /* CONFIG_EVB64260 not defined */
+ /* We are booting from 16-bit flash.
+ */
+ GT_REG_WRITE(DEVICE_BOOT_BANK_PARAMETERS, CFG_16BIT_BOOT_PAR);
+#endif
gt_cpu_config();
@@ -351,7 +357,7 @@
void
debug_led(int led, int mode)
{
-#ifndef CONFIG_ZUMA_V2
+#if !defined(CONFIG_ZUMA_V2) && !defined(CONFIG_P3G4)
volatile int *addr = NULL;
int dummy;
diff --git a/board/evb64260/flash.c b/board/evb64260/flash.c
index c897393..e6cf8eb 100644
--- a/board/evb64260/flash.c
+++ b/board/evb64260/flash.c
@@ -54,6 +54,7 @@
static ulong flash_get_size (int portwidth, vu_long *addr, flash_info_t *info);
static int write_word (flash_info_t *info, ulong dest, ulong data);
static void flash_get_offsets (ulong base, flash_info_t *info);
+static flash_info_t *flash_get_info(ulong base);
/*-----------------------------------------------------------------------
*/
@@ -72,7 +73,11 @@
/* the boot flash */
base = CFG_FLASH_BASE;
- size_b0 = flash_get_size(1, (vu_long *)base, &flash_info[0]);
+#ifndef CFG_BOOT_FLASH_WIDTH
+#define CFG_BOOT_FLASH_WIDTH 1
+#endif
+ size_b0 = flash_get_size(CFG_BOOT_FLASH_WIDTH, (vu_long *)base,
+ &flash_info[0]);
printf("[%ldkB@%lx] ", size_b0/1024, base);
@@ -98,6 +103,22 @@
base+=size;
}
+#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
+ /* monitor protection ON by default */
+ flash_protect(FLAG_PROTECT_SET,
+ CFG_MONITOR_BASE,
+ CFG_MONITOR_BASE + monitor_flash_len - 1,
+ flash_get_info(CFG_MONITOR_BASE));
+#endif
+
+#ifdef CFG_ENV_IS_IN_FLASH
+ /* ENV protection ON by default */
+ flash_protect(FLAG_PROTECT_SET,
+ CFG_ENV_ADDR,
+ CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
+ flash_get_info(CFG_ENV_ADDR));
+#endif
+
flash_size = size_b0 + size_b1;
return flash_size;
}
@@ -144,6 +165,23 @@
}
}
}
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+static flash_info_t *flash_get_info(ulong base)
+{
+ int i;
+ flash_info_t * info;
+
+ for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
+ info = & flash_info[i];
+ if (info->start[0] <= base && base <= info->start[0] + info->size - 1)
+ break;
+ }
+
+ return i == CFG_MAX_FLASH_BANKS ? 0 : info;
}
/*-----------------------------------------------------------------------
@@ -247,8 +285,11 @@
/* 2x16 */
unsigned long cmd32=(cmd<<16)|cmd;
*(volatile unsigned long *)(addr+offset*2)=cmd32;
+ } else if (width == 2) {
+ /* 1x16 */
+ *(volatile unsigned short *)((unsigned short*)addr+offset)=cmd;
} else {
- /* 1x16 or 1x8 */
+ /* 1x8 */
*(volatile unsigned char *)(addr+offset)=cmd;
}
}
diff --git a/board/evb64260/mpsc.c b/board/evb64260/mpsc.c
index 718fe05..ee623ca 100644
--- a/board/evb64260/mpsc.c
+++ b/board/evb64260/mpsc.c
@@ -273,7 +273,7 @@
/* BRG CONFIG */
galbrg_set_baudrate(CHANNEL, baud);
-#ifdef CONFIG_ZUMA_V2
+#if defined(CONFIG_ZUMA_V2) || defined(CONFIG_P3G4)
galbrg_set_clksrc(CHANNEL,0x8); /* connect TCLK -> BRG */
#else
galbrg_set_clksrc(CHANNEL,0);
@@ -387,7 +387,7 @@
galbrg_disable(channel);
-#ifdef CONFIG_ZUMA_V2
+#if defined(CONFIG_ZUMA_V2) || defined(CONFIG_P3G4)
/* from tclk */
clock = (CFG_BUS_HZ/(16*rate)) - 1;
#else
@@ -803,6 +803,7 @@
galmpsc_shutdown(int mpsc)
{
DECLARE_GLOBAL_DATA_PTR;
+#if 0
unsigned int temp;
/* cause RX abort (clears RX) */
@@ -810,9 +811,11 @@
temp |= MPSC_RX_ABORT | MPSC_TX_ABORT;
temp &= ~MPSC_ENTER_HUNT;
GT_REG_WRITE_MIRROR(GALMPSC_CHANNELREG_2,mpsc,GALMPSC_REG_GAP,temp);
+#endif
- GT_REG_WRITE(GALSDMA_0_COM_REG, 0);
- GT_REG_WRITE(GALSDMA_0_COM_REG, SDMA_TX_ABORT | SDMA_RX_ABORT);
+ GT_REG_WRITE(GALSDMA_0_COM_REG + CHANNEL * GALSDMA_REG_DIFF, 0);
+ GT_REG_WRITE(GALSDMA_0_COM_REG + CHANNEL * GALSDMA_REG_DIFF,
+ SDMA_TX_ABORT | SDMA_RX_ABORT);
/* shut down the MPSC */
GT_REG_WRITE(GALMPSC_MCONF_LOW, 0);
@@ -823,14 +826,15 @@
/* shut down the sdma engines. */
/* reset config to default */
- GT_REG_WRITE(GALSDMA_0_CONF_REG, 0x000000fc);
+ GT_REG_WRITE(GALSDMA_0_CONF_REG + CHANNEL * GALSDMA_REG_DIFF,
+ 0x000000fc);
udelay(100);
/* clear the SDMA current and first TX and RX pointers */
- GT_REG_WRITE(GALSDMA_0_CUR_RX_PTR, 0);
- GT_REG_WRITE(GALSDMA_0_CUR_TX_PTR, 0);
- GT_REG_WRITE(GALSDMA_0_FIR_TX_PTR, 0);
+ GT_REG_WRITE(GALSDMA_0_CUR_RX_PTR + CHANNEL * GALSDMA_REG_DIFF, 0);
+ GT_REG_WRITE(GALSDMA_0_CUR_TX_PTR + CHANNEL * GALSDMA_REG_DIFF, 0);
+ GT_REG_WRITE(GALSDMA_0_FIR_TX_PTR + CHANNEL * GALSDMA_REG_DIFF, 0);
udelay(100);
diff --git a/board/evb64260/sdram_init.c b/board/evb64260/sdram_init.c
index 3616565..d019d22 100644
--- a/board/evb64260/sdram_init.c
+++ b/board/evb64260/sdram_init.c
@@ -175,7 +175,30 @@
return 0;
}
-#else /* ! CONFIG_ZUMA_V2 */
+#elif defined(CONFIG_P3G4)
+
+static int
+check_dimm(uchar slot, sdram_info_t *info)
+{
+ memset(info, 0, sizeof(*info));
+
+ if (slot)
+ return 0;
+
+ info->slot = slot;
+ info->banks = 1;
+ info->registered = 0;
+ info->drb_size = 4;
+ info->tpar = 3;
+ info->tras_clocks = 6;
+ info->burst_len = 4;
+#ifdef CONFIG_ECC
+ info->ecc = 2;
+#endif
+ return 0;
+}
+
+#else /* ! CONFIG_ZUMA_V2 && ! CONFIG_P3G4*/
/* This code reads the SPD chip on the sdram and populates
* the array which is passed in with the relevant information */