rockchip: rk3399: Configure sdmmc regulator pinctrl in SPL
A few boards have shown to be required to properly configure pinctrl
for the fixed regulator gpio pin used by sdmmc before being able to read
from SD-cards.
Include the related gpio, regulator and pinctrl nodes and enable related
Kconfig options so that pinctrl can be configured in SPL for boards that
may be affected by such issue.
Also change to imply SPL_DM_SEQ_ALIAS for all boards because it must be
enabled for working gpio usage in SPL after a future DT sync.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
diff --git a/arch/arm/dts/rk3399-nanopi4-u-boot.dtsi b/arch/arm/dts/rk3399-nanopi4-u-boot.dtsi
index a126bba..e0d7a51 100644
--- a/arch/arm/dts/rk3399-nanopi4-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-nanopi4-u-boot.dtsi
@@ -5,6 +5,18 @@
#include "rk3399-u-boot.dtsi"
+&gpio0 {
+ bootph-pre-ram;
+};
+
&sdmmc {
pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_cd>;
};
+
+&sdmmc0_pwr_h {
+ bootph-pre-ram;
+};
+
+&vcc3v0_sd {
+ bootph-pre-ram;
+};
diff --git a/arch/arm/dts/rk3399-orangepi-u-boot.dtsi b/arch/arm/dts/rk3399-orangepi-u-boot.dtsi
index d4327ea..b7452ec 100644
--- a/arch/arm/dts/rk3399-orangepi-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-orangepi-u-boot.dtsi
@@ -6,6 +6,18 @@
#include "rk3399-u-boot.dtsi"
#include "rk3399-sdram-ddr3-1333.dtsi"
+&gpio0 {
+ bootph-pre-ram;
+};
+
+&sdmmc0_pwr_h {
+ bootph-pre-ram;
+};
+
+&vcc3v0_sd {
+ bootph-pre-ram;
+};
+
&vdd_log {
regulator-init-microvolt = <950000>;
};
diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
index 17af95a..2341db4 100644
--- a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
@@ -10,6 +10,10 @@
rockchip,panel = <&edp_panel>;
};
+&gpio0 {
+ bootph-pre-ram;
+};
+
&sdhci {
max-frequency = <25000000>;
};
@@ -18,11 +22,19 @@
max-frequency = <20000000>;
};
+&sdmmc0_pwr_h_pin {
+ bootph-pre-ram;
+};
+
&spiflash {
bootph-pre-ram;
bootph-some-ram;
};
+&vcc3v0_sd {
+ bootph-pre-ram;
+};
+
&vdd_log {
regulator-init-microvolt = <950000>;
};
diff --git a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
index d40daac..aecf7db 100644
--- a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
@@ -32,6 +32,10 @@
vin-supply = <&vcc_vbus_typec0>;
};
+&gpio4 {
+ bootph-pre-ram;
+};
+
&spi1 {
flash@0 {
bootph-pre-ram;
@@ -39,6 +43,14 @@
};
};
+&vcc3v0_sd {
+ bootph-pre-ram;
+};
+
+&vcc3v0_sd_en {
+ bootph-pre-ram;
+};
+
&vcc5v0_host {
regulator-always-on;
};
diff --git a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
index e280739..43b6799 100644
--- a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
@@ -28,11 +28,19 @@
};
};
+&gpio0 {
+ bootph-pre-ram;
+};
+
&sdhci {
cap-mmc-highspeed;
mmc-ddr-1_8v;
};
+&sdmmc0_pwr_h {
+ bootph-pre-ram;
+};
+
&spi1 {
flash@0 {
bootph-pre-ram;
@@ -40,6 +48,10 @@
};
};
+&vcc3v0_sd {
+ bootph-pre-ram;
+};
+
&vdd_center {
regulator-min-microvolt = <950000>;
regulator-max-microvolt = <950000>;
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 7d6374b..262cb7c 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -277,6 +277,7 @@
imply ROCKCHIP_COMMON_BOARD
imply ROCKCHIP_EFUSE
imply ROCKCHIP_SDRAM_COMMON
+ imply SPL_DM_SEQ_ALIAS
imply SPL_FIT_SIGNATURE
imply SPL_ROCKCHIP_COMMON_BOARD
imply SYS_BOOTCOUNT_SINGLEWORD if BOOTCOUNT_LIMIT