tree 1fe7b0b2032fedd7e5728146159c2e7c9d9eb153
parent bcc8e4daa975b18a3cbe0dd9bffa3ea79cafa069
author Thierry Reding <treding@nvidia.com> 1418189126 -0700
committer Tom Warren <twarren@nvidia.com> 1418934101 -0700

net: rtl8169: Use non-cached memory if available

To work around potential issues with explicit cache maintenance of the
RX and TX descriptor rings, allocate them from a pool of uncached memory
if the architecture supports it.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>