* Added support for both PCMCIA slots (at the same time!) on MPC8xx
* Patch by Rod Boyce, 21 Nov 2002:
fix PCMCIA on MBX8xx board
* Patch by Pierre Aubert , 21 Nov 2002
Add CFG_CPM_POST_WORD_ADDR to make the offset of the
bootmode word in DPRAM configurable
diff --git a/include/configs/KUP4K.h b/include/configs/KUP4K.h
index 7c512cc..6de004f 100644
--- a/include/configs/KUP4K.h
+++ b/include/configs/KUP4K.h
@@ -270,7 +270,8 @@
*
*/
-#define CONFIG_PCMCIA_SLOT_B 1 /* KUP4K use SLOT_B */
+/* KUP4K use both slots, SLOT_A as "primary". */
+#define CONFIG_PCMCIA_SLOT_A 1
#define CFG_PCMCIA_MEM_ADDR (0xE0000000)
#define CFG_PCMCIA_MEM_SIZE ( 64 << 20 )
@@ -281,6 +282,8 @@
#define CFG_PCMCIA_IO_ADDR (0xEC000000)
#define CFG_PCMCIA_IO_SIZE ( 64 << 20 )
+#define PCMCIA_SOCKETS_NO 2
+#define PCMCIA_MEM_WIN_NO 8
/*-----------------------------------------------------------------------
* IDE/ATA stuff (Supports IDE harddisk on PCMCIA Adapter)
*-----------------------------------------------------------------------
@@ -292,11 +295,13 @@
#undef CONFIG_IDE_LED /* LED for ide not supported */
#undef CONFIG_IDE_RESET /* reset for ide not supported */
-#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
-#define CFG_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
+#define CFG_IDE_MAXBUS 2
+#define CFG_IDE_MAXDEVICE 4
#define CFG_ATA_IDE0_OFFSET 0x0000
+#define CFG_ATA_IDE1_OFFSET (4 * CFG_PCMCIA_MEM_SIZE)
+
#define CFG_ATA_BASE_ADDR CFG_PCMCIA_MEM_ADDR
/* Offset for data I/O */
diff --git a/include/configs/lwmon.h b/include/configs/lwmon.h
index a89633a..53667c0 100644
--- a/include/configs/lwmon.h
+++ b/include/configs/lwmon.h
@@ -67,15 +67,16 @@
#undef CONFIG_BOOTARGS
/* POST support */
-#define CONFIG_POST (CFG_POST_CACHE | \
+#define CONFIG_POST (CFG_POST_CACHE | \
CFG_POST_WATCHDOG | \
- CFG_POST_RTC | \
- CFG_POST_MEMORY | \
- CFG_POST_CPU | \
- CFG_POST_UART | \
- CFG_POST_ETHER | \
- CFG_POST_SPI | \
- CFG_POST_USB | \
+ CFG_POST_RTC | \
+ CFG_POST_MEMORY | \
+ CFG_POST_CPU | \
+ CFG_POST_UART | \
+ CFG_POST_ETHER | \
+ CFG_POST_I2C | \
+ CFG_POST_SPI | \
+ CFG_POST_USB | \
CFG_POST_SPR)
#define CONFIG_BOOTCOMMAND "run flash_self"
@@ -116,16 +117,11 @@
#undef CONFIG_STATUS_LED /* Status LED disabled */
/* enable I2C and select the hardware/software driver */
-#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
+#undef CONFIG_HARD_I2C /* I2C with hardware support */
+#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
-#ifdef CONFIG_HARD_I2C
-/*
- * Hardware (CPM) I2C driver configuration
- */
-# define CFG_I2C_SPEED 93000 /* 93 kHz is supposed to work */
-# define CFG_I2C_SLAVE 0xFE
-#endif /* CONFIG_HARD_I2C */
+#define CFG_I2C_SPEED 93000 /* 93 kHz is supposed to work */
+#define CFG_I2C_SLAVE 0xFE
#ifdef CONFIG_SOFT_I2C
/*