Support for XUPV2P board
Reset support
BSP autoconfig support
diff --git a/CREDITS b/CREDITS
index 8021588..f896e7c 100644
--- a/CREDITS
+++ b/CREDITS
@@ -470,3 +470,8 @@
 E: timur@freescale.com
 D: Support for MPC8349E-mITX
 W: www.freescale.com
+
+N: Michal Simek
+E: monstr@monstr.eu
+D: Support for Microblaze, ML401, XUPV2P board
+W: www.monstr.eu
diff --git a/MAINTAINERS b/MAINTAINERS
index 1d0a8df..965f646 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -562,6 +562,11 @@
 
 	SUZAKU			MicroBlaze
 
+Michal Simek <monstr@monstr.eu>
+
+	ML401			MicroBlaze
+	XUPV2P			MicroBlaze
+
 #########################################################################
 # Coldfire Systems:							#
 #									#
diff --git a/MAKEALL b/MAKEALL
index 172f3e5..36efa40 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -292,7 +292,7 @@
 #########################################################################
 
 LIST_microblaze="	\
-	suzaku		ml401
+	suzaku		ml401		xupv2p
 "
 
 #########################################################################
diff --git a/Makefile b/Makefile
index f67eb26..db7b040 100644
--- a/Makefile
+++ b/Makefile
@@ -2309,6 +2309,11 @@
 	@echo "#define CONFIG_ML401 1" >> include/config.h
 	@./mkconfig -a $(@:_config=) microblaze microblaze ml401 xilinx
 
+xupv2p_config:	unconfig
+	@ >include/config.h
+	@echo "#define CONFIG_XUPV2P 1" >> include/config.h
+	@./mkconfig -a $(@:_config=) microblaze microblaze xupv2p xilinx
+
 #########################################################################
 ## Blackfin
 #########################################################################
diff --git a/board/AtmarkTechno/suzaku/u-boot.lds b/board/AtmarkTechno/suzaku/u-boot.lds
index 93147fc..cb90854 100644
--- a/board/AtmarkTechno/suzaku/u-boot.lds
+++ b/board/AtmarkTechno/suzaku/u-boot.lds
@@ -63,4 +63,5 @@
 		*(.bss)
 		__bss_end = .;
 	}
+	__end = . ;
 }
diff --git a/board/xilinx/ml401/config.mk b/board/xilinx/ml401/config.mk
index 48f792a..07c9c4f 100644
--- a/board/xilinx/ml401/config.mk
+++ b/board/xilinx/ml401/config.mk
@@ -1,26 +1,11 @@
+#*********************************************************************
 #
-# (C) Copyright 2004 Atmark Techno, Inc.
-#
-# Yasushi SHOJI <yashi@atmark-techno.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
+# CAUTION: This file is automatically generated by libgen.
+# Version: Xilinx EDK 6.3 EDK_Gmm.12.3
+# Description: U-BOOT Configuration File
+# Michal Simek - monstr@monstr.eu
 #
+#**********************************************************************
 
 TEXT_BASE = 0x12000000
 
diff --git a/board/xilinx/ml401/u-boot.lds b/board/xilinx/ml401/u-boot.lds
index 93147fc..cb90854 100644
--- a/board/xilinx/ml401/u-boot.lds
+++ b/board/xilinx/ml401/u-boot.lds
@@ -63,4 +63,5 @@
 		*(.bss)
 		__bss_end = .;
 	}
+	__end = . ;
 }
diff --git a/board/xilinx/ml401/xparameters.h b/board/xilinx/ml401/xparameters.h
index 8ec2864..10ffd98 100644
--- a/board/xilinx/ml401/xparameters.h
+++ b/board/xilinx/ml401/xparameters.h
@@ -1,56 +1,48 @@
-/*
- * (C) Copyright 2007 Michal Simek
- *
- * Michal  SIMEK <monstr@monstr.eu>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
+/*********************************************************************
+#
+# CAUTION: This file is automatically generated by libgen.
+# Version: Xilinx EDK 6.3 EDK_Gmm.12.3
+# Description: U-BOOT Configuration File
+# Michal Simek - monstr@monstr.eu
+#
+**********************************************************************/
 
-/* DDR SDRAM */
-#define CONFIG_XILINX_ERAM_START 0x10000000
-#define CONFIG_XILINX_ERAM_SIZE 0x04000000
+/* System Clock Frequency */
+#define XILINX_CLOCK_FREQ	66666667
 
-/* FLASH_MEMORY Settings */
-#define CONFIG_XILINX_FLASH_START 0x28000000
-#define CONFIG_XILINX_FLASH_SIZE 0x00800000
+/* Interrupt controller is intc_0 */
+#define XILINX_INTC_BASEADDR	0xd1000fc0
+#define XILINX_INTC_NUM_INTR_INPUTS	12
 
-/* serial line */
-#define CONFIG_XILINX_UARTLITE_0_BASEADDR 0xA0000000
-#define CONFIG_XILINX_UARTLITE_0_BAUDRATE 115200
+/* Timer pheriphery is opb_timer_0 */
+#define XILINX_TIMER_BASEADDR	0xa2000000
+#define XILINX_TIMER_IRQ	0
 
-/* GPIO */
-#define CONFIG_XILINX_GPIO_0_BASEADDR 0x90000000
+/* Uart pheriphery is console_uart */
+#define XILINX_UART_BASEADDR	0xa0000000
+#define XILINX_UART_BAUDRATE	115200
 
-/* INTC */
-#define CONFIG_XILINX_INTC_0_BASEADDR 0xD1000FC0
-#define CONFIG_XILINX_INTC_0_NUM_INTR_INPUTS 12
+/* GPIO is opb_gpio_0*/
+#define XILINX_GPIO_BASEADDR	0x90000000
 
-/* TIMER */
-#define CONFIG_XILINX_TIMER_0_BASEADDR 0xA2000000
-#define CONFIG_XILINX_TIMER_0_IRQ 0
+/* Flash Memory is opb_emc_0 */
+#define XILINX_FLASH_START	0x28000000
+#define XILINX_FLASH_SIZE	0x00800000
+
+/* Main Memory is plb_ddr_0 */
+#define XILINX_RAM_START	0x10000000
+#define XILINX_RAM_SIZE	0x10000000
+
+/* Sysace Controller is opb_sysace_0 */
+#define XILINX_SYSACE_BASEADDR	0xCF000000
+#define XILINX_SYSACE_HIGHADDR	0xCF0001FF
+#define XILINX_SYSACE_MEM_WIDTH	16
 
-/* ethernet */
-#define XPAR_XEMAC_NUM_INSTANCES 1
-#define XPAR_OPB_ETHERNET_0_BASEADDR 0x60000000
-#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x60003FFF
-#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0
-#define XPAR_EMAC_0_DEVICE_ID 0
-#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1
-#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1
-#define XPAR_OPB_ETHERNET_0_MII_EXIST 1
+/* Ethernet controller is opb_ethernet_0 */
+#define XPAR_XEMAC_NUM_INSTANCES	1
+#define XPAR_OPB_ETHERNET_0_DEVICE_ID	0
+#define XPAR_OPB_ETHERNET_0_BASEADDR	0x60000000
+#define XPAR_OPB_ETHERNET_0_HIGHADDR	0x60003FFF
+#define XPAR_OPB_ETHERNET_0_DMA_PRESENT	1
+#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST	1
+#define XPAR_OPB_ETHERNET_0_MII_EXIST	1
diff --git a/board/xilinx/xilinx_enet/emac_adapter.c b/board/xilinx/xilinx_enet/emac_adapter.c
index de62695..5a7e59e 100644
--- a/board/xilinx/xilinx_enet/emac_adapter.c
+++ b/board/xilinx/xilinx_enet/emac_adapter.c
@@ -147,7 +147,7 @@
 	RecvFrameLength = PKTSIZE;
 	Result = XEmac_PollRecv(&Emac, (u8 *) etherrxbuff, &RecvFrameLength);
 	if (Result == XST_SUCCESS) {
-#ifndef CONFIG_MICROBLAZE 
+#ifndef CONFIG_EMACLITE 
 		NetReceive((uchar *)etherrxbuff, RecvFrameLength);
 #else
 		NetReceive(etherrxbuff, RecvFrameLength);
diff --git a/board/xilinx/xupv2p/Makefile b/board/xilinx/xupv2p/Makefile
new file mode 100644
index 0000000..9ab5633
--- /dev/null
+++ b/board/xilinx/xupv2p/Makefile
@@ -0,0 +1,65 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+ifneq ($(OBJTREE),$(SRCTREE))
+$(shell mkdir -p $(obj)../common)
+$(shell mkdir -p $(obj)../xilinx_enet)
+endif
+
+INCS		:= -I../common -I../xilinx_enet
+CFLAGS		+= $(INCS)
+HOST_CFLAGS	+= $(INCS)
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS	= $(BOARD).o \
+	  ../xilinx_enet/emac_adapter.o  ../xilinx_enet/xemac.o \
+	  ../xilinx_enet/xemac_options.o ../xilinx_enet/xemac_polled.o \
+	  ../xilinx_enet/xemac_intr.o ../xilinx_enet/xemac_g.o \
+	  ../xilinx_enet/xemac_intr_dma.o ../common/xipif_v1_23_b.o \
+	  ../common/xbasic_types.o ../common/xdma_channel.o \
+	  ../common/xdma_channel_sg.o ../common/xpacket_fifo_v1_00_b.o \
+	  ../common/xversion.o \
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(OBJS) $(SOBJS)
+	$(AR) $(ARFLAGS) $@ $^
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/xilinx/xupv2p/config.mk b/board/xilinx/xupv2p/config.mk
new file mode 100644
index 0000000..94c13c8
--- /dev/null
+++ b/board/xilinx/xupv2p/config.mk
@@ -0,0 +1,14 @@
+#*********************************************************************
+#
+# CAUTION: This file is automatically generated by libgen.
+# Version: Xilinx EDK 8.2.02 EDK_Im_Sp2.4
+# Description: U-BOOT Configuration File
+# Michal Simek - monstr@monstr.eu
+#
+#**********************************************************************
+
+TEXT_BASE = 0x38000000
+
+PLATFORM_CPPFLAGS += -mno-xl-soft-mul
+PLATFORM_CPPFLAGS += -mno-xl-soft-div
+PLATFORM_CPPFLAGS += -mxl-barrel-shift
diff --git a/board/xilinx/xupv2p/u-boot.lds b/board/xilinx/xupv2p/u-boot.lds
new file mode 100644
index 0000000..cb90854
--- /dev/null
+++ b/board/xilinx/xupv2p/u-boot.lds
@@ -0,0 +1,67 @@
+/*
+ * (C) Copyright 2004 Atmark Techno, Inc.
+ *
+ * Yasushi SHOJI <yashi@atmark-techno.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(microblaze)
+ENTRY(_start)
+
+SECTIONS
+{
+	.text ALIGN(0x4):
+	{
+		__text_start = .;
+		cpu/microblaze/start.o (.text)
+		*(.text)
+		__text_end = .;
+	}
+
+	.rodata ALIGN(0x4):
+	{
+		__rodata_start = .;
+		*(.rodata)
+		__rodata_end = .;
+	}
+
+	.data ALIGN(0x4):
+	{
+		__data_start = .;
+		*(.data)
+		__data_end = .;
+	}
+
+	.u_boot_cmd ALIGN(0x4):
+	{
+		. = .;
+		__u_boot_cmd_start = .;
+		*(.u_boot_cmd)
+		__u_boot_cmd_end = .;
+	}
+
+	.bss ALIGN(0x4):
+	{
+		__bss_start = .;
+		*(.bss)
+		__bss_end = .;
+	}
+	__end = . ;
+}
diff --git a/board/xilinx/xupv2p/xparameters.h b/board/xilinx/xupv2p/xparameters.h
new file mode 100644
index 0000000..fc7d6e7
--- /dev/null
+++ b/board/xilinx/xupv2p/xparameters.h
@@ -0,0 +1,46 @@
+/*********************************************************************
+#
+# CAUTION: This file is automatically generated by libgen.
+# Version: Xilinx EDK 8.2.02 EDK_Im_Sp2.4
+# Description: U-BOOT Configuration File
+# Michal Simek - monstr@monstr.eu
+#
+**********************************************************************/
+
+/* System Clock Frequency */
+#define XILINX_CLOCK_FREQ	100000000
+
+/* Interrupt controller is opb_intc_0 */
+#define XILINX_INTC_BASEADDR	0x41200000
+#define XILINX_INTC_NUM_INTR_INPUTS	11
+
+/* Timer pheriphery is opb_timer_1 */
+#define XILINX_TIMER_BASEADDR	0x41c00000
+#define XILINX_TIMER_IRQ	1
+
+/* Uart pheriphery is RS232_Uart_1 */
+#define XILINX_UART_BASEADDR	0x40600000
+#define XILINX_UART_BAUDRATE	115200
+
+/* GPIO is LEDs_4Bit*/
+#define XILINX_GPIO_BASEADDR	0x40000000
+
+/* FLASH doesn't exist none */
+
+/* Main Memory is DDR_256MB_32MX64_rank1_row13_col10_cl2_5 */
+#define XILINX_RAM_START	0x30000000
+#define XILINX_RAM_SIZE	0x10000000
+
+/* Sysace Controller is SysACE_CompactFlash */
+#define XILINX_SYSACE_BASEADDR	0x41800000
+#define XILINX_SYSACE_HIGHADDR	0x4180ffff
+#define XILINX_SYSACE_MEM_WIDTH	16
+
+/* Ethernet controller is Ethernet_MAC */
+#define XPAR_XEMAC_NUM_INSTANCES	1
+#define XPAR_OPB_ETHERNET_0_DEVICE_ID	0
+#define XPAR_OPB_ETHERNET_0_BASEADDR	0x40c00000
+#define XPAR_OPB_ETHERNET_0_HIGHADDR	0x40c0ffff
+#define XPAR_OPB_ETHERNET_0_DMA_PRESENT	1
+#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST	1
+#define XPAR_OPB_ETHERNET_0_MII_EXIST	1
diff --git a/board/xilinx/xupv2p/xupv2p.c b/board/xilinx/xupv2p/xupv2p.c
new file mode 100644
index 0000000..a341ac2
--- /dev/null
+++ b/board/xilinx/xupv2p/xupv2p.c
@@ -0,0 +1,49 @@
+/*
+ * (C) Copyright 2007 Michal Simek
+ *
+ * Michal  SIMEK <monstr@monstr.eu>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/* This is a board specific file.  It's OK to include board specific
+ * header files */
+
+#include <common.h>
+#include <configs/ml401.h>
+
+void do_reset (void)
+{
+#ifdef CFG_GPIO_0
+	*((unsigned long *)(CFG_GPIO_0_ADDR)) =
+	    ++(*((unsigned long *)(CFG_GPIO_0_ADDR)));
+#endif
+#ifdef CFG_RESET_ADDRESS
+	puts ("Reseting board\n");
+	asm ("bra r0");
+#endif
+}
+
+int gpio_init (void)
+{
+#ifdef CFG_GPIO_0
+	*((unsigned long *)(CFG_GPIO_0_ADDR)) = 0x0;
+#endif
+	return 0;
+}
diff --git a/common/env_common.c b/common/env_common.c
index 6e193cf..eb33422 100644
--- a/common/env_common.c
+++ b/common/env_common.c
@@ -222,14 +222,6 @@
 	DEBUGF ("%s[%d] malloced ENV at %p\n", __FUNCTION__,__LINE__,env_ptr);
 #endif
 
-#ifdef CONFIG_MICROBLAZE
-	/*
-	 * FIXME MALLOC error for Microblaze - error malloc return
-	 * bad value. Correct value is CFG_MONITOR_BASE - CFG_MALLOC_LEN.
-	 */
-	env_ptr = (env_t *)CFG_MONITOR_BASE;
-	DEBUGF ("%s[%d] malloced ENV at %p\n", __FUNCTION__,__LINE__,env_ptr);
-#endif
 	/*
 	 * After relocation to RAM, we can always use the "memory" functions
 	 */
diff --git a/cpu/microblaze/interrupts.c b/cpu/microblaze/interrupts.c
index 37ed16d..2db847c 100644
--- a/cpu/microblaze/interrupts.c
+++ b/cpu/microblaze/interrupts.c
@@ -95,7 +95,7 @@
 {
 	struct irq_action *act;
 	/* irq out of range */
-	if ((irq < 0) || (irq > CONFIG_XILINX_INTC_0_NUM_INTR_INPUTS)) {
+	if ((irq < 0) || (irq > CFG_INTC_0_NUM)) {
 		puts ("IRQ out of range\n");
 		return;
 	}
@@ -131,7 +131,7 @@
 {
 	int i;
 	/* initialize irq list */
-	for (i = 0; i < CONFIG_XILINX_INTC_0_NUM_INTR_INPUTS; i++) {
+	for (i = 0; i < CFG_INTC_0_NUM; i++) {
 		vecs[i].handler = (interrupt_handler_t *) def_hdlr;
 		vecs[i].arg = (void *)i;
 		vecs[i].count = 0;
@@ -189,7 +189,7 @@
 	      "Nr  Routine   Arg       Count\n"
 	      "-----------------------------\n");
 
-	for (i = 0; i < CONFIG_XILINX_INTC_0_NUM_INTR_INPUTS; i++) {
+	for (i = 0; i < CFG_INTC_0_NUM; i++) {
 		if (act->handler != (interrupt_handler_t*) def_hdlr) {
 			printf ("%02d  %08lx  %08lx  %d\n", i,
 				(int)act->handler, (int)act->arg, act->count);
diff --git a/cpu/microblaze/start.S b/cpu/microblaze/start.S
index bce3297..29481af 100644
--- a/cpu/microblaze/start.S
+++ b/cpu/microblaze/start.S
@@ -31,6 +31,7 @@
 _start:
 	mts	rmsr, r0	/* disable cache */
 	addi	r1, r0, CFG_INIT_SP_OFFSET
+	addi	r1, r1, -4	/* Decrement SP to top of memory */
 	/* add opcode instruction for 32bit jump - 2 instruction imm & brai*/
 	addi	r6, r0, 0xb000	/* hex b000 opcode imm */
 	bslli	r6, r6, 16	/* shift */
@@ -53,6 +54,23 @@
 	lhu	r7, r1, r0
 	shi	r7, r0, 0x2
 	shi	r6, r0, 0x6
+/* 
+ * Copy U-Boot code to TEXT_BASE
+ * solve problem with sbrk_base
+ */
+#if (CFG_RESET_ADDRESS != TEXT_BASE)
+	addi	r4, r0, __end
+	addi	r5, r0, __text_start
+	rsub	r4, r5, r4	/* size = __end - __text_start */
+	addi	r6, r0, CFG_RESET_ADDRESS	/* source address */
+	addi	r7, r0, 0	/* counter */
+4:
+	lw	r8, r6, r7
+	sw	r8, r5, r7
+	addi	r7, r7, 0x4
+	cmp	r8, r4, r7
+	blti	r8, 4b
+#endif
 #endif
 
 #ifdef CFG_USR_EXCEP
@@ -85,6 +103,17 @@
 	ori	r12, r12, 0xa0
 	mts	rmsr, r12
 
-	/* jumping to board_init */
+clear_bss:
+	/* clear BSS segments */
+	addi	r5, r0, __bss_start
+	addi	r4, r0, __bss_end
+	cmp	r6, r5, r4
+	beqi	r6, 3f
+2:
+	swi     r0, r5, 0 /* write zero to loc */
+	addi    r5, r5, 4 /* increment to next loc */
+	cmp     r6, r5, r4 /* check if we have reach the end */
+	bnei    r6, 2b
+3:	/* jumping to board_init */
 	brai	board_init
 1:	bri	1b
diff --git a/include/configs/ml401.h b/include/configs/ml401.h
index 4dc2afc..f4a8a1f 100644
--- a/include/configs/ml401.h
+++ b/include/configs/ml401.h
@@ -31,27 +31,31 @@
 #define	CONFIG_ML401		1	/* ML401 Board */
 
 /* uart */
-#define	CONFIG_SERIAL_BASE	CONFIG_XILINX_UARTLITE_0_BASEADDR
-#define	CONFIG_BAUDRATE		CONFIG_XILINX_UARTLITE_0_BAUDRATE
+#define	CONFIG_SERIAL_BASE	XILINX_UART_BASEADDR
+#define	CONFIG_BAUDRATE		XILINX_UART_BAUDRATE
 #define	CFG_BAUDRATE_TABLE	{ CONFIG_BAUDRATE }
 
 /* setting reset address */
 #define	CFG_RESET_ADDRESS	TEXT_BASE
 
+/* ethernet */
+#define CONFIG_EMACLITE		1
+#define XPAR_EMAC_0_DEVICE_ID	XPAR_XEMAC_NUM_INSTANCES
+
 /* gpio */
 #define	CFG_GPIO_0		1
-#define	CFG_GPIO_0_ADDR		CONFIG_XILINX_GPIO_0_BASEADDR
+#define	CFG_GPIO_0_ADDR		XILINX_GPIO_BASEADDR
 
 /* interrupt controller */
 #define	CFG_INTC_0		1
-#define	CFG_INTC_0_ADDR		CONFIG_XILINX_INTC_0_BASEADDR
-#define	CFG_INTC_0_NUM		CONFIG_XILINX_INTC_0_NUM_INTR_INPUTS
+#define	CFG_INTC_0_ADDR		XILINX_INTC_BASEADDR
+#define	CFG_INTC_0_NUM		XILINX_INTC_NUM_INTR_INPUTS
 
 /* timer */
 #define	CFG_TIMER_0		1
-#define	CFG_TIMER_0_ADDR	CONFIG_XILINX_TIMER_0_BASEADDR
-#define	CFG_TIMER_0_IRQ		CONFIG_XILINX_TIMER_0_IRQ
-#define	FREQUENCE		66666666
+#define	CFG_TIMER_0_ADDR	XILINX_TIMER_BASEADDR
+#define	CFG_TIMER_0_IRQ		XILINX_TIMER_IRQ
+#define	FREQUENCE		XILINX_CLOCK_FREQ
 #define	CFG_TIMER_0_PRELOAD	( FREQUENCE/1000 )
 
 /*
@@ -62,6 +66,7 @@
  *
  * CFG_GBL_DATA_OFFSET = 0x1000_0000 + 0x0400_0000 - 0x1000 = 0x13FF_F000
  * CFG_MONITOR_BASE = 0x13FF_F000 - 0x40000 = 0x13FB_F000
+ * CFG_MALLOC_BASE = 0x13FB_F000 - 0x40000 = 0x13F7_F000 
  *
  * 0x1000_0000	CFG_SDRAM_BASE
  *					FREE
@@ -71,16 +76,18 @@
  *					FREE
  *
  *					STACK
+ * 0x13F7_F000	CFG_MALLOC_BASE
+ *					MALLOC_AREA	256kB	Alloc
  * 0x11FB_F000	CFG_MONITOR_BASE
- *					MONITOR_CODE
+ *					MONITOR_CODE	256kB	Env
  * 0x13FF_F000	CFG_GBL_DATA_OFFSET
- * 					GLOBAL_DATA
+ * 					GLOBAL_DATA	4kB	bd, gd
  * 0x1400_0000	CFG_SDRAM_BASE + CFG_SDRAM_SIZE
  */
 
 /* ddr sdram - main memory */
-#define	CFG_SDRAM_BASE		CONFIG_XILINX_ERAM_START
-#define	CFG_SDRAM_SIZE		CONFIG_XILINX_ERAM_SIZE
+#define	CFG_SDRAM_BASE		XILINX_RAM_START
+#define	CFG_SDRAM_SIZE		XILINX_RAM_SIZE
 #define	CFG_MEMTEST_START	CFG_SDRAM_BASE
 #define	CFG_MEMTEST_END		(CFG_SDRAM_BASE + 0x1000)
 
@@ -92,7 +99,9 @@
 #define	SIZE			0x40000
 #define	CFG_MONITOR_LEN		SIZE
 #define	CFG_MONITOR_BASE	(CFG_GBL_DATA_OFFSET - CFG_MONITOR_LEN)
+#define	CFG_MONITOR_END		(CFG_MONITOR_BASE + CFG_MONITOR_LEN)
 #define	CFG_MALLOC_LEN		SIZE
+#define	CFG_MALLOC_BASE		(CFG_MONITOR_BASE - CFG_MALLOC_LEN)
 
 /* stack */
 #define	CFG_INIT_SP_OFFSET	CFG_MONITOR_BASE
@@ -101,8 +110,8 @@
 #define	FLASH
 
 #ifdef FLASH
-	#define	CFG_FLASH_BASE		CONFIG_XILINX_FLASH_START
-	#define	CFG_FLASH_SIZE		CONFIG_XILINX_FLASH_SIZE
+	#define	CFG_FLASH_BASE		XILINX_FLASH_START
+	#define	CFG_FLASH_SIZE		XILINX_FLASH_SIZE
 	#define	CFG_FLASH_CFI		1
 	#define	CFG_FLASH_CFI_DRIVER	1
 	#define	CFG_FLASH_EMPTY_INFO	1	/* ?empty sector */
@@ -214,8 +223,8 @@
 /* system ace */
 /*#define CONFIG_SYSTEMACE
 #define DEBUG_SYSTEMACE
-#define CFG_SYSTEMACE_BASE 0xCF000000
-#define CFG_SYSTEMACE_WIDTH	8
+#define CFG_SYSTEMACE_BASE	XILINX_SYSACE_BASEADDR
+#define CFG_SYSTEMACE_WIDTH	XILINX_SYSACE_MEM_WIDTH
 #define CONFIG_DOS_PARTITION
 */
 #endif	/* __CONFIG_H */
diff --git a/include/configs/suzaku.h b/include/configs/suzaku.h
index 1ee6be1..be19269 100644
--- a/include/configs/suzaku.h
+++ b/include/configs/suzaku.h
@@ -44,8 +44,9 @@
 #define CFG_FLASH_SIZE		0x00400000
 #define CFG_RESET_ADDRESS	0xfff00100
 #define CFG_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor */
-#define CFG_MONITOR_BASE        (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - (1024 * 1024))
+#define CFG_MONITOR_BASE	(CFG_SDRAM_BASE + CFG_SDRAM_SIZE - (1024 * 1024))
 #define CFG_MALLOC_LEN		(256 << 10)	/* Reserve 256 kB for malloc */
+#define CFG_MALLOC_BASE		(CFG_MONITOR_BASE - (1024 * 1024))
 
 #define CONFIG_BAUDRATE		115200
 #define CFG_BAUDRATE_TABLE	{ 115200 }
diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h
new file mode 100644
index 0000000..224db5c
--- /dev/null
+++ b/include/configs/xupv2p.h
@@ -0,0 +1,174 @@
+/*
+ * (C) Copyright 2007 Czech Technical University.
+ *
+ * Michal SIMEK <monstr@monstr.eu>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include "../board/xilinx/xupv2p/xparameters.h"
+
+#define	CONFIG_MICROBLAZE	1	/* MicroBlaze CPU */
+#define	CONFIG_XUPV2P		1
+
+/* uart */
+#define	CONFIG_SERIAL_BASE	XILINX_UART_BASEADDR
+#define	CONFIG_BAUDRATE		XILINX_UART_BAUDRATE
+#define	CFG_BAUDRATE_TABLE	{ CONFIG_BAUDRATE }
+
+/* ethernet */
+#define CONFIG_EMAC	1
+#define XPAR_EMAC_0_DEVICE_ID	XPAR_XEMAC_NUM_INSTANCES
+
+/*
+ * setting reset address
+ * 
+ * TEXT_BASE is set to place, where the U-BOOT run in RAM, but
+ * if you want to store U-BOOT in flash, set CFG_RESET_ADDRESS
+ * to FLASH memory and after loading bitstream jump to FLASH.
+ * U-BOOT auto-relocate to TEXT_BASE. After RESET command Microblaze
+ * jump to CFG_RESET_ADDRESS where is the original U-BOOT code.
+ */
+#define	CFG_RESET_ADDRESS	0x36000000
+
+/* gpio */
+#define	CFG_GPIO_0		1
+#define	CFG_GPIO_0_ADDR		XILINX_GPIO_BASEADDR
+
+/* interrupt controller */
+#define	CFG_INTC_0		1
+#define	CFG_INTC_0_ADDR		XILINX_INTC_BASEADDR
+#define	CFG_INTC_0_NUM		XILINX_INTC_NUM_INTR_INPUTS
+
+/* timer */
+#define	CFG_TIMER_0		1
+#define	CFG_TIMER_0_ADDR	XILINX_TIMER_BASEADDR
+#define	CFG_TIMER_0_IRQ		XILINX_TIMER_IRQ
+#define	FREQUENCE		XILINX_CLOCK_FREQ
+#define	CFG_TIMER_0_PRELOAD	( FREQUENCE/1000 )
+
+/*
+ * memory layout - Example
+ * TEXT_BASE = 0x3600_0000;
+ * CFG_SRAM_BASE = 0x3000_0000;
+ * CFG_SRAM_SIZE = 0x1000_0000;
+ *
+ * CFG_GBL_DATA_OFFSET = 0x3000_0000 + 0x1000_0000 - 0x1000 = 0x3FFF_F000
+ * CFG_MONITOR_BASE = 0x3FFF_F000 - 0x40000 = 0x3FFB_F000
+ * CFG_MALLOC_BASE = 0x3FFB_F000 - 0x40000 = 0x3FF7_F000
+ *
+ * 0x3000_0000	CFG_SDRAM_BASE
+ *					FREE
+ * 0x3600_0000	TEXT_BASE
+ *		U-BOOT code
+ * 0x3602_0000
+ *					FREE
+ *
+ *					STACK
+ * 0x3FF7_F000	CFG_MALLOC_BASE
+ *					MALLOC_AREA	256kB	Alloc
+ * 0x3FFB_F000	CFG_MONITOR_BASE
+ *					MONITOR_CODE	256kB	Env
+ * 0x3FFF_F000	CFG_GBL_DATA_OFFSET
+ * 					GLOBAL_DATA	4kB	bd, gd
+ * 0x4000_0000	CFG_SDRAM_BASE + CFG_SDRAM_SIZE
+ */
+
+/* ddr sdram - main memory */
+#define	CFG_SDRAM_BASE		XILINX_RAM_START
+#define	CFG_SDRAM_SIZE		XILINX_RAM_SIZE
+#define	CFG_MEMTEST_START	CFG_SDRAM_BASE
+#define	CFG_MEMTEST_END		(CFG_SDRAM_BASE + 0x1000)
+
+/* global pointer */
+#define	CFG_GBL_DATA_SIZE	0x1000	/* size of global data */
+#define	CFG_GBL_DATA_OFFSET     (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE) /* start of global data */
+
+/* monitor code */
+#define	SIZE			0x40000
+#define	CFG_MONITOR_LEN		SIZE
+#define	CFG_MONITOR_BASE	(CFG_GBL_DATA_OFFSET - CFG_MONITOR_LEN)
+#define	CFG_MONITOR_END		(CFG_MONITOR_BASE + CFG_MONITOR_LEN)
+#define	CFG_MALLOC_LEN		SIZE
+#define	CFG_MALLOC_BASE		(CFG_MONITOR_BASE - CFG_MALLOC_LEN)
+
+/* stack */
+#define	CFG_INIT_SP_OFFSET	CFG_MALLOC_BASE
+
+#define	CFG_NO_FLASH		1
+#define	CFG_ENV_IS_NOWHERE	1
+#define	CFG_ENV_SIZE		0x1000
+#define	CFG_ENV_ADDR		(CFG_MONITOR_BASE - CFG_ENV_SIZE)
+#define	CONFIG_COMMANDS	(CONFIG__CMD_DFL |\
+			CFG_CMD_MEMORY |\
+			CFG_CMD_IRQ |\
+			CFG_CMD_BDI |\
+			CFG_CMD_NET |\
+			CFG_CMD_IMI |\
+			CFG_CMD_ECHO |\
+			CFG_CMD_CACHE |\
+			CFG_CMD_RUN |\
+			CFG_CMD_AUTOSCRIPT |\
+			CFG_CMD_ASKENV |\
+			CFG_CMD_LOADS |\
+			CFG_CMD_LOADB |\
+			CFG_CMD_MISC |\
+			CFG_CMD_PING \
+			)
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+/* Miscellaneous configurable options */
+#define	CFG_PROMPT	"U-Boot-mONStR> "
+#define	CFG_CBSIZE	512	/* size of console buffer */
+#define	CFG_PBSIZE	(CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) /* print buffer size */
+#define	CFG_MAXARGS	15	/* max number of command args */
+#define	CFG_LONGHELP
+#define	CFG_LOAD_ADDR	0x12000000 /* default load address */
+
+#define	CONFIG_BOOTDELAY 	30
+#define	CONFIG_BOOTARGS		"root=romfs"
+#define	CONFIG_HOSTNAME		"ml401"
+#define	CONFIG_BOOTCOMMAND 	"base 0;tftp 11000000 image.img;bootm"
+#define	CONFIG_IPADDR		192.168.0.3
+#define	CONFIG_SERVERIP 	192.168.0.5
+#define	CONFIG_GATEWAYIP 	192.168.0.1
+#define	CONFIG_ETHADDR		00:E0:0C:00:00:FD
+
+/* architecture dependent code */
+#define	CFG_USR_EXCEP	/* user exception */
+#define CFG_HZ	1000
+
+#define CONFIG_PREBOOT	"echo U-BOOT by mONStR;"	\
+	"base 0;" \
+	"echo"
+
+
+/* system ace */
+/*#define	CONFIG_SYSTEMACE
+#define	DEBUG_SYSTEMACE
+#define	CFG_SYSTEMACE_BASE	0xCF000000
+#define	CFG_SYSTEMACE_WIDTH	16
+#define	CONFIG_DOS_PARTITION*/
+
+#endif	/* __CONFIG_H */
diff --git a/lib_microblaze/board.c b/lib_microblaze/board.c
index 273d9c4..c95125a 100644
--- a/lib_microblaze/board.c
+++ b/lib_microblaze/board.c
@@ -59,8 +59,8 @@
  */
 static void mem_malloc_init (void)
 {
-	mem_malloc_end = CFG_MONITOR_BASE + CFG_MONITOR_LEN;
-	mem_malloc_start = CFG_MONITOR_BASE;
+	mem_malloc_end = (CFG_MALLOC_BASE + CFG_MALLOC_LEN);
+	mem_malloc_start = CFG_MALLOC_BASE;
 	mem_malloc_brk = mem_malloc_start;
 	memset ((void *)mem_malloc_start, 0, mem_malloc_end - mem_malloc_start);
 }