board: presidio-asic: Add basic G3 engr. development board support
Add basic Presidio G3 engineering board support
Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 9303beb..6915783 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -909,6 +909,8 @@
dtb-$(CONFIG_TARGET_DURIAN) += phytium-durian.dtb
+dtb-$(CONFIG_TARGET_PRESIDIO_ASIC) += ca-presidio-engboard.dtb
+
targets += $(dtb-y)
# Add any required device tree compiler flags here
diff --git a/arch/arm/dts/ca-presidio-engboard.dts b/arch/arm/dts/ca-presidio-engboard.dts
new file mode 100644
index 0000000..c03dacc
--- /dev/null
+++ b/arch/arm/dts/ca-presidio-engboard.dts
@@ -0,0 +1,69 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020, Cortina Access Inc.
+ */
+
+/dts-v1/;
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <1>;
+
+ mmc0: mmc@f4400000 {
+ compatible = "snps,dw-cortina";
+ reg = <0x0 0xf4400000 0x1000>;
+ bus-width = <4>;
+ io_ds = <0x77>;
+ fifo-mode;
+ sd_dll_ctrl = <0xf43200e8>;
+ io_drv_ctrl = <0xf432004c>;
+ };
+
+ gpio0: gpio-controller@0xf4329280 {
+ compatible = "cortina,ca-gpio";
+ reg = <0x0 0xf4329280 0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ status = "okay";
+ };
+ gpio1: gpio-controller@0xf43292a4 {
+ compatible = "cortina,ca-gpio";
+ reg = <0x0 0xf43292a4 0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ status = "disabled";
+ };
+
+ watchdog: watchdog@0xf432901c {
+ compatible = "cortina,ca-wdt";
+ reg = <0x0 0xf432901c 0x34>,
+ <0x0 0xf4320020 0x04>;
+ status = "okay";
+ };
+
+ uart0: serial@0xf4329148 {
+ u-boot,dm-pre-reloc;
+ compatible = "cortina,ca-uart";
+ reg = <0x0 0xf4329148 0x30>;
+ status = "okay";
+ };
+
+ i2c: i2c@f4329120 {
+ compatible = "cortina,ca-i2c";
+ reg = <0x0 0xf4329120 0x28>;
+ clock-frequency = <400000>;
+ };
+
+ sflash: sflash-controller@f4324000 {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "cortina,ca-sflash";
+ reg = <0x0 0xf4324000 0x50>;
+ reg-names = "sflash-regs";
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ spi-rx-bus-width = <1>;
+ spi-max-frequency = <108000000>;
+ };
+ };
+};