arm: Remove PXA architecture support
With the last platform for this architecture removed, remove the rest of
the architecture support as well.
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
diff --git a/include/dm/platform_data/pxa_mmc_gen.h b/include/dm/platform_data/pxa_mmc_gen.h
deleted file mode 100644
index d15c155..0000000
--- a/include/dm/platform_data/pxa_mmc_gen.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (c) 2019 Marcel Ziswiler <marcel.ziswiler@toradex.com>
- */
-
-#ifndef __PXA_MMC_GEN_H
-#define __PXA_MMC_GEN_H
-
-#include <mmc.h>
-
-/*
- * struct pxa_mmc_plat - information about a PXA MMC controller
- *
- * @base: MMC controller base register address
- */
-struct pxa_mmc_plat {
- struct mmc_config cfg;
- struct mmc mmc;
- struct pxa_mmc_regs *base;
-};
-
-#endif /* __PXA_MMC_GEN_H */
diff --git a/include/dm/platform_data/serial_pxa.h b/include/dm/platform_data/serial_pxa.h
deleted file mode 100644
index e1a02ae..0000000
--- a/include/dm/platform_data/serial_pxa.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (c) 2016 Marcel Ziswiler <marcel.ziswiler@toradex.com>
- */
-
-#ifndef __SERIAL_PXA_H
-#define __SERIAL_PXA_H
-
-/*
- * The numbering scheme differs here for PXA25x, PXA27x and PXA3xx so we can
- * easily handle enabling of clock.
- */
-#ifdef CONFIG_CPU_MONAHANS
-#define UART_CLK_BASE CKENA_21_BTUART
-#define UART_CLK_REG CKENA
-#define BTUART_INDEX 0
-#define FFUART_INDEX 1
-#define STUART_INDEX 2
-#else /* PXA27x */
-#define UART_CLK_BASE CKEN5_STUART
-#define UART_CLK_REG CKEN
-#define STUART_INDEX 0
-#define FFUART_INDEX 1
-#define BTUART_INDEX 2
-#endif
-
-/*
- * struct pxa_serial_plat - information about a PXA port
- *
- * @base: Uart port base register address
- * @port: Uart port index, for cpu with pinmux for uart / gpio
- * baudrtatre: Uart port baudrate
- */
-struct pxa_serial_plat {
- struct pxa_uart_regs *base;
- int port;
- int baudrate;
-};
-
-#endif /* __SERIAL_PXA_H */
diff --git a/include/lcd.h b/include/lcd.h
index 7570e7a..4f18069 100644
--- a/include/lcd.h
+++ b/include/lcd.h
@@ -40,9 +40,7 @@
*/
void lcd_set_flush_dcache(int flush);
-#if defined(CONFIG_CPU_PXA27X) || defined CONFIG_CPU_MONAHANS
-#include <pxa_lcd.h>
-#elif defined(CONFIG_ATMEL_LCD) || defined(CONFIG_ATMEL_HLCD)
+#if defined(CONFIG_ATMEL_LCD) || defined(CONFIG_ATMEL_HLCD)
#include <atmel_lcd.h>
#elif defined(CONFIG_EXYNOS_FB)
#include <exynos_lcd.h>
diff --git a/include/pxa_lcd.h b/include/pxa_lcd.h
deleted file mode 100644
index 11a22ab..0000000
--- a/include/pxa_lcd.h
+++ /dev/null
@@ -1,80 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * pxa_lcd.h - PXA LCD Controller structures
- *
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- */
-
-#ifndef _PXA_LCD_H_
-#define _PXA_LCD_H_
-
-/*
- * PXA LCD DMA descriptor
- */
-struct pxafb_dma_descriptor {
- u_long fdadr; /* Frame descriptor address register */
- u_long fsadr; /* Frame source address register */
- u_long fidr; /* Frame ID register */
- u_long ldcmd; /* Command register */
-};
-
-/*
- * PXA LCD info
- */
-struct pxafb_info {
- /* Misc registers */
- u_long reg_lccr3;
- u_long reg_lccr2;
- u_long reg_lccr1;
- u_long reg_lccr0;
- u_long fdadr0;
- u_long fdadr1;
-
- /* DMA descriptors */
- struct pxafb_dma_descriptor *dmadesc_fblow;
- struct pxafb_dma_descriptor *dmadesc_fbhigh;
- struct pxafb_dma_descriptor *dmadesc_palette;
-
- u_long screen; /* physical address of frame buffer */
- u_long palette; /* physical address of palette memory */
- u_int palette_size;
-};
-
-/*
- * LCD controller stucture for PXA CPU
- */
-typedef struct vidinfo {
- ushort vl_col; /* Number of columns (i.e. 640) */
- ushort vl_row; /* Number of rows (i.e. 480) */
- ushort vl_rot; /* Rotation of Display (0, 1, 2, 3) */
- ushort vl_width; /* Width of display area in millimeters */
- ushort vl_height; /* Height of display area in millimeters */
-
- /* LCD configuration register */
- u_char vl_clkp; /* Clock polarity */
- u_char vl_oep; /* Output Enable polarity */
- u_char vl_hsp; /* Horizontal Sync polarity */
- u_char vl_vsp; /* Vertical Sync polarity */
- u_char vl_dp; /* Data polarity */
- u_char vl_bpix;/* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
- u_char vl_lbw; /* LCD Bus width, 0 = 4, 1 = 8 */
- u_char vl_splt;/* Split display, 0 = single-scan, 1 = dual-scan */
- u_char vl_clor; /* Color, 0 = mono, 1 = color */
- u_char vl_tft; /* 0 = passive, 1 = TFT */
-
- /* Horizontal control register. Timing from data sheet */
- ushort vl_hpw; /* Horz sync pulse width */
- u_char vl_blw; /* Wait before of line */
- u_char vl_elw; /* Wait end of line */
-
- /* Vertical control register. */
- u_char vl_vpw; /* Vertical sync pulse width */
- u_char vl_bfw; /* Wait before of frame */
- u_char vl_efw; /* Wait end of frame */
-
- /* PXA LCD controller params */
- struct pxafb_info pxa;
-} vidinfo_t;
-
-#endif
diff --git a/include/usb/pxa27x_udc.h b/include/usb/pxa27x_udc.h
deleted file mode 100644
index 07d1482..0000000
--- a/include/usb/pxa27x_udc.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * PXA27x register declarations and HCD data structures
- *
- * Copyright (C) 2007 Rodolfo Giometti <giometti@linux.it>
- * Copyright (C) 2007 Eurotech S.p.A. <info@eurotech.it>
- */
-
-
-#ifndef __PXA270X_UDC_H__
-#define __PXA270X_UDC_H__
-
-#include <asm/byteorder.h>
-
-/* Endpoint 0 states */
-#define EP0_IDLE 0
-#define EP0_IN_DATA 1
-#define EP0_OUT_DATA 2
-#define EP0_XFER_COMPLETE 3
-
-
-/* Endpoint parameters */
-#define MAX_ENDPOINTS 4
-
-#define EP0_MAX_PACKET_SIZE 16
-
-#define UDC_OUT_ENDPOINT 0x02
-#define UDC_IN_ENDPOINT 0x01
-#define UDC_INT_ENDPOINT 0x05
-
-#endif