| commit | 1e36545a7d5e9e831af217b810d1e1bdb89424ac | [log] [tgz] |
|---|---|---|
| author | Ley Foon Tan <ley.foon.tan@intel.com> | Fri Apr 17 14:45:35 2020 +0800 |
| committer | Tom Rini <trini@konsulko.com> | Fri Apr 24 16:40:09 2020 -0400 |
| tree | d14f6669d89c38b5d584b6b57e95bf6e38862448 | |
| parent | b09a18df615e3a9d69582eb8eec9f06b00c08705 [diff] |
cache: l2x0: Fix write to incorrect shared-override bit The existing code write bit-0 for shared attribute override enable bit. It should be bit-22 based on cache controller specification [1]. [1] http://infocenter.arm.com/help/topic/com.arm.doc.ddi0246f/DDI0246F_l2c310_r3p2_trm.pdf Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>