Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts:
arch/arm/cpu/armv7/rmobile/Makefile
doc/README.scrapyard
Needed manual fix:
arch/arm/cpu/armv7/omap-common/Makefile
board/compulab/cm_t335/u-boot.lds
diff --git a/arch/arm/cpu/armv7/am33xx/Makefile b/arch/arm/cpu/armv7/am33xx/Makefile
index 966fcab..5566310 100644
--- a/arch/arm/cpu/armv7/am33xx/Makefile
+++ b/arch/arm/cpu/armv7/am33xx/Makefile
@@ -19,4 +19,3 @@
obj-y += emif4.o
obj-y += board.o
obj-y += mux.o
-obj-$(CONFIG_NAND_OMAP_GPMC) += elm.o
diff --git a/arch/arm/cpu/armv7/am33xx/elm.c b/arch/arm/cpu/armv7/am33xx/elm.c
deleted file mode 100644
index 8f1d6af..0000000
--- a/arch/arm/cpu/armv7/am33xx/elm.c
+++ /dev/null
@@ -1,196 +0,0 @@
-/*
- * (C) Copyright 2010-2011 Texas Instruments, <www.ti.com>
- * Mansoor Ahamed <mansoor.ahamed@ti.com>
- *
- * BCH Error Location Module (ELM) support.
- *
- * NOTE:
- * 1. Supports only continuous mode. Dont see need for page mode in uboot
- * 2. Supports only syndrome polynomial 0. i.e. poly local variable is
- * always set to ELM_DEFAULT_POLY. Dont see need for other polynomial
- * sets in uboot
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/errno.h>
-#include <asm/arch/cpu.h>
-#include <asm/omap_gpmc.h>
-#include <asm/arch/elm.h>
-
-#define ELM_DEFAULT_POLY (0)
-
-struct elm *elm_cfg;
-
-/**
- * elm_load_syndromes - Load BCH syndromes based on nibble selection
- * @syndrome: BCH syndrome
- * @nibbles:
- * @poly: Syndrome Polynomial set to use
- *
- * Load BCH syndromes based on nibble selection
- */
-static void elm_load_syndromes(u8 *syndrome, u32 nibbles, u8 poly)
-{
- u32 *ptr;
- u32 val;
-
- /* reg 0 */
- ptr = &elm_cfg->syndrome_fragments[poly].syndrome_fragment_x[0];
- val = syndrome[0] | (syndrome[1] << 8) | (syndrome[2] << 16) |
- (syndrome[3] << 24);
- writel(val, ptr);
- /* reg 1 */
- ptr = &elm_cfg->syndrome_fragments[poly].syndrome_fragment_x[1];
- val = syndrome[4] | (syndrome[5] << 8) | (syndrome[6] << 16) |
- (syndrome[7] << 24);
- writel(val, ptr);
-
- /* BCH 8-bit with 26 nibbles (4*8=32) */
- if (nibbles > 13) {
- /* reg 2 */
- ptr = &elm_cfg->syndrome_fragments[poly].syndrome_fragment_x[2];
- val = syndrome[8] | (syndrome[9] << 8) | (syndrome[10] << 16) |
- (syndrome[11] << 24);
- writel(val, ptr);
- /* reg 3 */
- ptr = &elm_cfg->syndrome_fragments[poly].syndrome_fragment_x[3];
- val = syndrome[12] | (syndrome[13] << 8) |
- (syndrome[14] << 16) | (syndrome[15] << 24);
- writel(val, ptr);
- }
-
- /* BCH 16-bit with 52 nibbles (7*8=56) */
- if (nibbles > 26) {
- /* reg 4 */
- ptr = &elm_cfg->syndrome_fragments[poly].syndrome_fragment_x[4];
- val = syndrome[16] | (syndrome[17] << 8) |
- (syndrome[18] << 16) | (syndrome[19] << 24);
- writel(val, ptr);
-
- /* reg 5 */
- ptr = &elm_cfg->syndrome_fragments[poly].syndrome_fragment_x[5];
- val = syndrome[20] | (syndrome[21] << 8) |
- (syndrome[22] << 16) | (syndrome[23] << 24);
- writel(val, ptr);
-
- /* reg 6 */
- ptr = &elm_cfg->syndrome_fragments[poly].syndrome_fragment_x[6];
- val = syndrome[24] | (syndrome[25] << 8) |
- (syndrome[26] << 16) | (syndrome[27] << 24);
- writel(val, ptr);
- }
-}
-
-/**
- * elm_check_errors - Check for BCH errors and return error locations
- * @syndrome: BCH syndrome
- * @nibbles:
- * @error_count: Returns number of errrors in the syndrome
- * @error_locations: Returns error locations (in decimal) in this array
- *
- * Check the provided syndrome for BCH errors and return error count
- * and locations in the array passed. Returns -1 if error is not correctable,
- * else returns 0
- */
-int elm_check_error(u8 *syndrome, u32 nibbles, u32 *error_count,
- u32 *error_locations)
-{
- u8 poly = ELM_DEFAULT_POLY;
- s8 i;
- u32 location_status;
-
- elm_load_syndromes(syndrome, nibbles, poly);
-
- /* start processing */
- writel((readl(&elm_cfg->syndrome_fragments[poly].syndrome_fragment_x[6])
- | ELM_SYNDROME_FRAGMENT_6_SYNDROME_VALID),
- &elm_cfg->syndrome_fragments[poly].syndrome_fragment_x[6]);
-
- /* wait for processing to complete */
- while ((readl(&elm_cfg->irqstatus) & (0x1 << poly)) != 0x1)
- ;
- /* clear status */
- writel((readl(&elm_cfg->irqstatus) | (0x1 << poly)),
- &elm_cfg->irqstatus);
-
- /* check if correctable */
- location_status = readl(&elm_cfg->error_location[poly].location_status);
- if (!(location_status & ELM_LOCATION_STATUS_ECC_CORRECTABLE_MASK))
- return -1;
-
- /* get error count */
- *error_count = readl(&elm_cfg->error_location[poly].location_status) &
- ELM_LOCATION_STATUS_ECC_NB_ERRORS_MASK;
-
- for (i = 0; i < *error_count; i++) {
- error_locations[i] =
- readl(&elm_cfg->error_location[poly].error_location_x[i]);
- }
-
- return 0;
-}
-
-
-/**
- * elm_config - Configure ELM module
- * @level: 4 / 8 / 16 bit BCH
- *
- * Configure ELM module based on BCH level.
- * Set mode as continuous mode.
- * Currently we are using only syndrome 0 and syndromes 1 to 6 are not used.
- * Also, the mode is set only for syndrome 0
- */
-int elm_config(enum bch_level level)
-{
- u32 val;
- u8 poly = ELM_DEFAULT_POLY;
- u32 buffer_size = 0x7FF;
-
- /* config size and level */
- val = (u32)(level) & ELM_LOCATION_CONFIG_ECC_BCH_LEVEL_MASK;
- val |= ((buffer_size << ELM_LOCATION_CONFIG_ECC_SIZE_POS) &
- ELM_LOCATION_CONFIG_ECC_SIZE_MASK);
- writel(val, &elm_cfg->location_config);
-
- /* config continous mode */
- /* enable interrupt generation for syndrome polynomial set */
- writel((readl(&elm_cfg->irqenable) | (0x1 << poly)),
- &elm_cfg->irqenable);
- /* set continuous mode for the syndrome polynomial set */
- writel((readl(&elm_cfg->page_ctrl) & ~(0x1 << poly)),
- &elm_cfg->page_ctrl);
-
- return 0;
-}
-
-/**
- * elm_reset - Do a soft reset of ELM
- *
- * Perform a soft reset of ELM and return after reset is done.
- */
-void elm_reset(void)
-{
- /* initiate reset */
- writel((readl(&elm_cfg->sysconfig) | ELM_SYSCONFIG_SOFTRESET),
- &elm_cfg->sysconfig);
-
- /* wait for reset complete and normal operation */
- while ((readl(&elm_cfg->sysstatus) & ELM_SYSSTATUS_RESETDONE) !=
- ELM_SYSSTATUS_RESETDONE)
- ;
-}
-
-/**
- * elm_init - Initialize ELM module
- *
- * Initialize ELM support. Currently it does only base address init
- * and ELM reset.
- */
-void elm_init(void)
-{
- elm_cfg = (struct elm *)ELM_BASE;
- elm_reset();
-}
diff --git a/arch/arm/cpu/armv7/am33xx/mem.c b/arch/arm/cpu/armv7/am33xx/mem.c
index b6eb466..56c9e7d 100644
--- a/arch/arm/cpu/armv7/am33xx/mem.c
+++ b/arch/arm/cpu/armv7/am33xx/mem.c
@@ -22,17 +22,6 @@
struct gpmc *gpmc_cfg;
-#if defined(CONFIG_CMD_NAND)
-static const u32 gpmc_m_nand[GPMC_MAX_REG] = {
- M_NAND_GPMC_CONFIG1,
- M_NAND_GPMC_CONFIG2,
- M_NAND_GPMC_CONFIG3,
- M_NAND_GPMC_CONFIG4,
- M_NAND_GPMC_CONFIG5,
- M_NAND_GPMC_CONFIG6, 0
-};
-#endif
-
void enable_gpmc_cs_config(const u32 *gpmc_config, struct gpmc_cs *cs, u32 base,
u32 size)
@@ -61,11 +50,34 @@
{
/* putting a blanket check on GPMC based on ZeBu for now */
gpmc_cfg = (struct gpmc *)GPMC_BASE;
-
-#ifdef CONFIG_CMD_NAND
- const u32 *gpmc_config = NULL;
- u32 base = 0;
+#if defined(CONFIG_NOR)
+/* configure GPMC for NOR */
+ const u32 gpmc_regs[GPMC_MAX_REG] = { STNOR_GPMC_CONFIG1,
+ STNOR_GPMC_CONFIG2,
+ STNOR_GPMC_CONFIG3,
+ STNOR_GPMC_CONFIG4,
+ STNOR_GPMC_CONFIG5,
+ STNOR_GPMC_CONFIG6,
+ STNOR_GPMC_CONFIG7
+ };
+ u32 size = GPMC_SIZE_16M;
+ u32 base = CONFIG_SYS_FLASH_BASE;
+#elif defined(CONFIG_NAND)
+/* configure GPMC for NAND */
+ const u32 gpmc_regs[GPMC_MAX_REG] = { M_NAND_GPMC_CONFIG1,
+ M_NAND_GPMC_CONFIG2,
+ M_NAND_GPMC_CONFIG3,
+ M_NAND_GPMC_CONFIG4,
+ M_NAND_GPMC_CONFIG5,
+ M_NAND_GPMC_CONFIG6,
+ 0
+ };
+ u32 size = GPMC_SIZE_256M;
+ u32 base = CONFIG_SYS_NAND_BASE;
+#else
+ const u32 gpmc_regs[GPMC_MAX_REG] = { 0, 0, 0, 0, 0, 0, 0 };
u32 size = 0;
+ u32 base = 0;
#endif
/* global settings */
writel(0x00000008, &gpmc_cfg->sysconfig);
@@ -81,12 +93,6 @@
*/
writel(0, &gpmc_cfg->cs[0].config7);
sdelay(1000);
-
-#ifdef CONFIG_CMD_NAND
- gpmc_config = gpmc_m_nand;
-
- base = PISMO1_NAND_BASE;
- size = PISMO1_NAND_SIZE;
- enable_gpmc_cs_config(gpmc_config, &gpmc_cfg->cs[0], base, size);
-#endif
+ /* enable chip-select specific configurations */
+ enable_gpmc_cs_config(gpmc_regs, &gpmc_cfg->cs[0], base, size);
}
diff --git a/arch/arm/cpu/armv7/omap-common/Makefile b/arch/arm/cpu/armv7/omap-common/Makefile
index 679c1a1..59f5352 100644
--- a/arch/arm/cpu/armv7/omap-common/Makefile
+++ b/arch/arm/cpu/armv7/omap-common/Makefile
@@ -18,7 +18,7 @@
endif
ifneq ($(CONFIG_OMAP54XX),)
-COBJS += pipe3-phy.o
+obj-y += pipe3-phy.o
obj-$(CONFIG_SCSI_AHCI_PLAT) += sata.o
endif
diff --git a/arch/arm/cpu/armv7/omap-common/clocks-common.c b/arch/arm/cpu/armv7/omap-common/clocks-common.c
index bb77b5c..dfa3760 100644
--- a/arch/arm/cpu/armv7/omap-common/clocks-common.c
+++ b/arch/arm/cpu/armv7/omap-common/clocks-common.c
@@ -779,7 +779,8 @@
static int gpi2c = 1;
if (gpi2c) {
- i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+ i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED,
+ CONFIG_SYS_OMAP24_I2C_SLAVE);
gpi2c = 0;
}
}
diff --git a/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds b/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
index 5e93b34..02aa129 100644
--- a/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
+++ b/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
@@ -33,6 +33,11 @@
.data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
. = ALIGN(4);
+ .u_boot_list : {
+ KEEP(*(SORT(.u_boot_list*_i2c_*)));
+ } >.sram
+
+ . = ALIGN(4);
__image_copy_end = .;
_end = .;
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 7d1f8d9..2922816 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -98,7 +98,7 @@
gpmc_init();
#endif
#ifdef CONFIG_SPL_I2C_SUPPORT
- i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+ i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
#endif
}
#endif /* CONFIG_SPL_BUILD */
diff --git a/arch/arm/cpu/armv7/omap3/clock.c b/arch/arm/cpu/armv7/omap3/clock.c
index ae9c4c3..1bc27bd 100644
--- a/arch/arm/cpu/armv7/omap3/clock.c
+++ b/arch/arm/cpu/armv7/omap3/clock.c
@@ -708,7 +708,7 @@
sr32(&prcm_base->iclken_per, 17, 1, 1);
#endif
-#ifdef CONFIG_DRIVER_OMAP34XX_I2C
+#ifdef CONFIG_SYS_I2C_OMAP34XX
/* Turn on all 3 I2C clocks */
sr32(&prcm_base->fclken1_core, 15, 3, 0x7);
sr32(&prcm_base->iclken1_core, 15, 3, 0x7); /* I2C1,2,3 = on */
diff --git a/arch/arm/cpu/armv7/rmobile/Makefile b/arch/arm/cpu/armv7/rmobile/Makefile
index 7b9d47e..2221999 100644
--- a/arch/arm/cpu/armv7/rmobile/Makefile
+++ b/arch/arm/cpu/armv7/rmobile/Makefile
@@ -14,10 +14,4 @@
obj-$(CONFIG_R8A7790) += lowlevel_init_ca15.o cpu_info-r8a7790.o pfc-r8a7790.o
obj-$(CONFIG_R8A7791) += lowlevel_init_ca15.o cpu_info-r8a7791.o pfc-r8a7791.o
obj-$(CONFIG_SH73A0) += lowlevel_init.o cpu_info-sh73a0.o pfc-sh73a0.o
-obj-$(CONFIG_TMU_TIMER) += sh_timer.o
-
-SRCS += $(obj)sh_timer.c
-# from arch/sh/lib/ directory
-$(obj)sh_timer.c:
- @rm -f $(obj)sh_timer.c
- ln -s $(SRCTREE)/arch/sh/lib/time.c $(obj)sh_timer.c
+obj-$(CONFIG_TMU_TIMER) += ../../../../sh/lib/time.o