| commit | 1c7ed53a62558e538f490d5e5d8f4f0b4fa8a260 | [log] [tgz] |
|---|---|---|
| author | Chia-Wei Wang <chiawei_wang@aspeedtech.com> | Tue Sep 10 17:39:16 2024 +0800 |
| committer | Leo Yu-Chi Liang <ycliang@andestech.com> | Wed Sep 11 20:35:03 2024 +0800 |
| tree | e1554ebe4da7d87915116f64d3264d9dd4e12714 | |
| parent | f5e030794867199f98767f6b925c348a2a2c7d72 [diff] |
riscv: Add AST2700 SoC initial platform support AST2700 SoCs integrates a Ibex 32-bits RISC-V core as the boot MCU for the first stage bootloader execution, namely SPL. This patch implements the preliminary base to successfully run SPL on this RV32-based MCU to the console banner message. Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>