arm: am33xx: Fix MPU opp selection
Update MPU frequencies and voltages as per the latest
DM[1] dated: OCT 2011 Revised APRIL 2016, Section 5.4.
Below is the consolidated data:
MPU values for PG 2.0 and later(Package ZCZ and ZCE):
-------------------------------------------------------
| | ZCZ | ZCE |
|-------------------------------------------------------|
| | VDD[V] | ARM [MHz] | VDD[V] | ARM [MHz] |
|-------|----------|------------|----------|------------|
| NITRO | 1.325 | 1000 | NA | NA |
|-------|----------|------------|----------|------------|
| TURBO | 1.26 | 800 | NA | NA |
|-------|----------|------------|----------|------------|
|OPP120 | 1.20 | 720 | NA | NA |
|-------|----------|------------|----------|------------|
|OPP100 | 1.10 | 600 | 1.10 | 600 |
|-------|----------|------------|----------|------------|
| OPP50 | 0.95 | 300 | 0.95 | 300 |
-------------------------------------------------------
There is no eFuse blown on PG1.0 Silicons due to which there is
no way to detect the maximum frequencies supported. So default
to OPP100 for which both frequency and voltages are common on both
the packages.
[1] http://www.ti.com/lit/ds/symlink/am3356.pdf
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
diff --git a/arch/arm/include/asm/arch-am33xx/clocks_am33xx.h b/arch/arm/include/asm/arch-am33xx/clocks_am33xx.h
index c06b01b..dfdb6c7 100644
--- a/arch/arm/include/asm/arch-am33xx/clocks_am33xx.h
+++ b/arch/arm/include/asm/arch-am33xx/clocks_am33xx.h
@@ -16,7 +16,7 @@
#define MPUPLL_M_800 800
#define MPUPLL_M_720 720
#define MPUPLL_M_600 600
-#define MPUPLL_M_550 550
+#define MPUPLL_M_500 500
#define MPUPLL_M_300 300
#define UART_RESET (0x1 << 1)
diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h
index 54f449f..8cae291 100644
--- a/arch/arm/include/asm/arch-am33xx/cpu.h
+++ b/arch/arm/include/asm/arch-am33xx/cpu.h
@@ -49,6 +49,14 @@
#define TI81XX 0xB81E
#define DEVICE_ID (CTRL_BASE + 0x0600)
#define DEVICE_ID_MASK 0x1FFF
+#define PACKAGE_TYPE_SHIFT 16
+#define PACKAGE_TYPE_MASK (3 << 16)
+
+/* Package Type */
+#define PACKAGE_TYPE_UNDEFINED 0x0
+#define PACKAGE_TYPE_ZCZ 0x1
+#define PACKAGE_TYPE_ZCE 0x2
+#define PACKAGE_TYPE_RESERVED 0x3
/* MPU max frequencies */
#define AM335X_ZCZ_300 0x1FEF