| commit | 1b51e072c5e80bdc05880d25af09075508bde301 | [log] [tgz] |
|---|---|---|
| author | Cem Tenruh <c.tenruh@phytec.de> | Fri Jun 16 10:28:13 2023 +0200 |
| committer | Stefano Babic <sbabic@denx.de> | Thu Jul 13 11:29:40 2023 +0200 |
| tree | ade78ba2e589cc3da3161b86c8c4e710f8700aea | |
| parent | 0c6f3ce384a9b43cb7a659b8d9bb379fb556baa7 [diff] |
board: phytec: phycore_imx8mm: Update lpddr4_timing Update RAM Timings for 2GB RAM based on DDR Controller Configuration Spreadsheet revision 22. Including the update of the refresh rate to workaround errata ERR050805. Signed-off-by: Cem Tenruh <c.tenruh@phytec.de>