board: ti: dra76-evm: Add the pmic data
dra76-evm uses lp8736 and tps65917 pmic for powering on
various peripherals. Add data for these pmics and register
for dra76-evm.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
diff --git a/arch/arm/include/asm/arch-omap5/clock.h b/arch/arm/include/asm/arch-omap5/clock.h
index dbe340d..ee2e78b 100644
--- a/arch/arm/include/asm/arch-omap5/clock.h
+++ b/arch/arm/include/asm/arch-omap5/clock.h
@@ -340,6 +340,9 @@
/* Offset is 0.73V for LP873x */
#define LP873X_BUCK_BASE_VOLT_UV 730000
+/* Offset is 0.73V for LP87565 */
+#define LP87565_BUCK_BASE_VOLT_UV 730000
+
/* TPS659038 */
#define TPS659038_I2C_SLAVE_ADDR 0x58
#define TPS659038_REG_ADDR_SMPS12 0x23
@@ -353,6 +356,7 @@
#define TPS65917_REG_ADDR_SMPS1 0x23
#define TPS65917_REG_ADDR_SMPS2 0x27
#define TPS65917_REG_ADDR_SMPS3 0x2F
+#define TPS65917_REG_ADDR_SMPS4 0x33
/* LP873X */
#define LP873X_I2C_SLAVE_ADDR 0x60
@@ -360,6 +364,11 @@
#define LP873X_REG_ADDR_BUCK1 0x7
#define LP873X_REG_ADDR_LDO1 0xA
+/* LP87565 */
+#define LP87565_I2C_SLAVE_ADDR 0x61
+#define LP87565_REG_ADDR_BUCK01 0xA
+#define LP87565_REG_ADDR_BUCK23 0xE
+
/* TPS */
#define TPS62361_I2C_SLAVE_ADDR 0x60
#define TPS62361_REG_ADDR_SET0 0x0
diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
index e335210..d7e453e 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -607,6 +607,7 @@
extern struct pmic_data tps659038;
extern struct pmic_data lp8733;
+extern struct pmic_data lp87565;
void hw_data_init(void);
diff --git a/arch/arm/mach-omap2/omap5/hw_data.c b/arch/arm/mach-omap2/omap5/hw_data.c
index 19a8d10..7aaf379 100644
--- a/arch/arm/mach-omap2/omap5/hw_data.c
+++ b/arch/arm/mach-omap2/omap5/hw_data.c
@@ -306,6 +306,22 @@
.gpio_en = 0,
};
+/* The LP87565*/
+struct pmic_data lp87565 = {
+ .base_offset = LP873X_BUCK_BASE_VOLT_UV,
+ .step = 5000, /* 5 mV represented in uV */
+ /*
+ * Offset codes 0 - 0x13 Invalid.
+ * Offset codes 0x14 0x17 give 10mV steps
+ * Offset codes 0x17 through 0x9D give 5mV steps
+ * So let us start with our operating range from .73V
+ */
+ .start_code = 0x17,
+ .i2c_slave_addr = 0x60,
+ .pmic_bus_init = gpi2c_init,
+ .pmic_write = palmas_i2c_write_u8,
+};
+
/* The LP8732 and LP8733 are software-compatible, use common struct */
struct pmic_data lp8733 = {
.base_offset = LP873X_BUCK_BASE_VOLT_UV,