| commit | 1a798db192af444b6defd865a4943cfa23530726 | [log] [tgz] |
|---|---|---|
| author | Bryan Brattlof <bb@ti.com> | Wed Jan 26 16:07:33 2022 -0600 |
| committer | Tom Rini <trini@konsulko.com> | Tue Feb 08 09:41:27 2022 -0500 |
| tree | f673222a9176f1a30afd48e4c79f4a35b929a96c | |
| parent | 1d33b883aec6e1b5002e7c187066d7f36080cd48 [diff] |
soc: soc_ti_k3: update j721e revision numbering There is a 4 bit VARIANT number inside the JTAGID register that TI increments any time a new variant for a chip is produced. Each family of TI's SoCs uses a different versioning scheme based off that VARIANT number. CC: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Bryan Brattlof <bb@ti.com>