rockchip: veyron: Enable Winbond SPI flash
Some veyron boards seem to have Winbond SPI flash chips instead of
GigaDevice ones. At the very least, coreboot builds for veyron boards
have them enabled [1]. Enable support for them here as well.
[1] https://review.coreboot.org/c/coreboot/+/9719
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig
index d430235..253ef99 100644
--- a/configs/chromebit_mickey_defconfig
+++ b/configs/chromebit_mickey_defconfig
@@ -81,6 +81,7 @@
CONFIG_MTD=y
CONFIG_SF_DEFAULT_BUS=2
CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PINCTRL=y
CONFIG_PINCONF=y
CONFIG_SPL_PINCTRL=y
diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig
index 1a54986..3172f04 100644
--- a/configs/chromebook_jerry_defconfig
+++ b/configs/chromebook_jerry_defconfig
@@ -84,6 +84,7 @@
CONFIG_MTD=y
CONFIG_SF_DEFAULT_BUS=2
CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PINCTRL=y
CONFIG_PINCONF=y
CONFIG_SPL_PINCTRL=y
diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig
index 73ab2f6..25a56f4 100644
--- a/configs/chromebook_minnie_defconfig
+++ b/configs/chromebook_minnie_defconfig
@@ -83,6 +83,7 @@
CONFIG_MTD=y
CONFIG_SF_DEFAULT_BUS=2
CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PINCTRL=y
CONFIG_PINCONF=y
CONFIG_SPL_PINCTRL=y
diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig
index 06437aa..ff2a12b 100644
--- a/configs/chromebook_speedy_defconfig
+++ b/configs/chromebook_speedy_defconfig
@@ -82,6 +82,7 @@
CONFIG_MTD=y
CONFIG_SF_DEFAULT_BUS=2
CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PINCTRL=y
CONFIG_PINCONF=y
CONFIG_SPL_PINCTRL=y