serial: stm32: add Framing error support
Add management of Bit 1 of USART_ISR = FE: Framing error
This bit is set by hardware when a de-synchronization, excessive noise
or a break character is detected. It is cleared by software, writing 1
to the FECF bit in the USART_ICR register (for stm32 after f4).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c
index 3ab536a..00a8e72 100644
--- a/drivers/serial/serial_stm32.c
+++ b/drivers/serial/serial_stm32.c
@@ -106,10 +106,11 @@
if ((isr & USART_ISR_RXNE) == 0)
return -EAGAIN;
- if (isr & (USART_ISR_PE | USART_ISR_ORE)) {
+ if (isr & (USART_ISR_PE | USART_ISR_ORE | USART_ISR_FE)) {
if (!stm32f4)
setbits_le32(base + ICR_OFFSET,
- USART_ICR_PCECF | USART_ICR_ORECF);
+ USART_ICR_PCECF | USART_ICR_ORECF |
+ USART_ICR_FECF);
else
readl(base + RDR_OFFSET(stm32f4));
return -EIO;
diff --git a/drivers/serial/serial_stm32.h b/drivers/serial/serial_stm32.h
index 5549f8c..7b0c531 100644
--- a/drivers/serial/serial_stm32.h
+++ b/drivers/serial/serial_stm32.h
@@ -67,6 +67,7 @@
#define USART_ISR_TXE BIT(7)
#define USART_ISR_RXNE BIT(5)
#define USART_ISR_ORE BIT(3)
+#define USART_ISR_FE BIT(1)
#define USART_ISR_PE BIT(0)
#define USART_BRR_F_MASK GENMASK(7, 0)
@@ -74,6 +75,7 @@
#define USART_BRR_M_MASK GENMASK(15, 4)
#define USART_ICR_ORECF BIT(3)
+#define USART_ICR_FECF BIT(1)
#define USART_ICR_PCECF BIT(0)
#endif