tree 75eb811a38b5737b7ffbea2c3072db587553f844
parent c279727170e009e7e16a2318113b87a5a984427c
author Minkyu Kang <mk7.kang@samsung.com> 1350266280 +0000
committer Minkyu Kang <mk7.kang@samsung.com> 1352981299 +0900

EXYNOS: Clock: Add common function for pll rate calculation

Moved the common code to calculate pll clock rate to new function
exynos_get_pll_clk().

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>