diff --git a/arch/arm/cpu/armv7/ls102xa/cpu.c b/arch/arm/cpu/armv7/ls102xa/cpu.c
index ecf9e86..9ccfe10 100644
--- a/arch/arm/cpu/armv7/ls102xa/cpu.c
+++ b/arch/arm/cpu/armv7/ls102xa/cpu.c
@@ -296,7 +296,7 @@
 
 int cpu_eth_init(bd_t *bis)
 {
-#ifdef CONFIG_TSEC_ENET
+#if defined(CONFIG_TSEC_ENET) && !defined(CONFIG_DM_ETH)
 	tsec_standard_init(bis);
 #endif
 
diff --git a/arch/arm/cpu/armv7/ls102xa/fdt.c b/arch/arm/cpu/armv7/ls102xa/fdt.c
index 8bf9c42..1aadfff 100644
--- a/arch/arm/cpu/armv7/ls102xa/fdt.c
+++ b/arch/arm/cpu/armv7/ls102xa/fdt.c
@@ -16,12 +16,17 @@
 #include <tsec.h>
 #include <asm/arch/immap_ls102xa.h>
 #include <fsl_sec.h>
+#include <dm.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
 void ft_fixup_enet_phy_connect_type(void *fdt)
 {
+#ifdef CONFIG_DM_ETH
+	struct udevice *dev;
+#else
 	struct eth_device *dev;
+#endif
 	struct tsec_private *priv;
 	const char *enet_path, *phy_path;
 	char enet[16];
@@ -29,7 +34,12 @@
 	int phy_node;
 	int i = 0;
 	uint32_t ph;
+#ifdef CONFIG_DM_ETH
+	char *name[3] = { "ethernet@2d10000", "ethernet@2d50000",
+			  "ethernet@2d90000" };
+#else
 	char *name[3] = { "eTSEC1", "eTSEC2", "eTSEC3" };
+#endif
 
 	for (; i < ARRAY_SIZE(name); i++) {
 		dev = eth_get_dev_by_name(name[i]);
diff --git a/arch/arm/dts/ls1021a-twr.dtsi b/arch/arm/dts/ls1021a-twr.dtsi
index 5d3275c..27c96f9 100644
--- a/arch/arm/dts/ls1021a-twr.dtsi
+++ b/arch/arm/dts/ls1021a-twr.dtsi
@@ -51,6 +51,26 @@
 	};
 };
 
+&enet0 {
+	tbi-handle = <&tbi0>;
+	phy-handle = <&sgmii_phy2>;
+	phy-connection-type = "sgmii";
+	status = "okay";
+};
+
+&enet1 {
+	tbi-handle = <&tbi1>;
+	phy-handle = <&sgmii_phy0>;
+	phy-connection-type = "sgmii";
+	status = "okay";
+};
+
+&enet2 {
+	phy-handle = <&rgmii_phy1>;
+	phy-connection-type = "rgmii-id";
+	status = "okay";
+};
+
 &i2c0 {
 	status = "okay";
 };
@@ -84,12 +104,24 @@
 	sgmii_phy0: ethernet-phy@0 {
 		reg = <0x0>;
 	};
+
 	rgmii_phy1: ethernet-phy@1 {
 		reg = <0x1>;
 	};
+
 	sgmii_phy2: ethernet-phy@2 {
 		reg = <0x2>;
 	};
+
+	/* SGMII PCS for enet0 */
+	tbi0: tbi-phy@1f {
+		reg = <0x1f>;
+		device_type = "tbi-phy";
+	};
+};
+
+&mdio1 {
+	/* SGMII PCS for enet1 */
 	tbi1: tbi-phy@1f {
 		reg = <0x1f>;
 		device_type = "tbi-phy";
diff --git a/arch/arm/dts/ls1021a.dtsi b/arch/arm/dts/ls1021a.dtsi
index 7fb24ab..e419d9c 100644
--- a/arch/arm/dts/ls1021a.dtsi
+++ b/arch/arm/dts/ls1021a.dtsi
@@ -350,12 +350,36 @@
 				 <&platform_clk 1>;
 		};
 
+		enet0: ethernet@2d10000 {
+			compatible = "fsl,etsec2";
+			reg = <0x2d10000 0x1000>;
+			status = "disabled";
+		};
+
+		enet1: ethernet@2d50000 {
+			compatible = "fsl,etsec2";
+			reg = <0x2d50000 0x1000>;
+			status = "disabled";
+		};
+
+		enet2: ethernet@2d90000 {
+			compatible = "fsl,etsec2";
+			reg = <0x2d90000 0x1000>;
+			status = "disabled";
+		};
+
 		mdio0: mdio@2d24000 {
-			compatible = "gianfar";
-			device_type = "mdio";
+			compatible = "fsl,etsec2-mdio";
+			reg = <0x2d24000 0x4000>;
 			#address-cells = <1>;
 			#size-cells = <0>;
-			reg = <0x2d24000 0x4000>;
+		};
+
+		mdio1: mdio@2d64000 {
+			compatible = "fsl,etsec2-mdio";
+			reg = <0x2d64000 0x4000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
 		};
 
 		usb@8600000 {