arm: v7R: Add support for enabling caches
Cache maintenance procedure is same for v7A and v7R
processors. So re-use cache-cp15.c file except for
mmu parts.
Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index febb253..0688f1e 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -8,11 +8,13 @@
#include <asm/system.h>
#include <asm/cache.h>
#include <linux/compiler.h>
+#include <asm/armv7_mpu.h>
#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
DECLARE_GLOBAL_DATA_PTR;
+#ifdef CONFIG_SYS_ARM_MMU
__weak void arm_init_before_mmu(void)
{
}
@@ -201,15 +203,23 @@
{
return get_cr() & CR_M;
}
+#endif /* CONFIG_SYS_ARM_MMU */
/* cache_bit must be either CR_I or CR_C */
static void cache_enable(uint32_t cache_bit)
{
uint32_t reg;
- /* The data cache is not active unless the mmu is enabled too */
+ /* The data cache is not active unless the mmu/mpu is enabled too */
+#ifdef CONFIG_SYS_ARM_MMU
if ((cache_bit == CR_C) && !mmu_enabled())
mmu_setup();
+#elif defined(CONFIG_SYS_ARM_MPU)
+ if ((cache_bit == CR_C) && !mpu_enabled()) {
+ printf("Consider enabling MPU before enabling caches\n");
+ return;
+ }
+#endif
reg = get_cr(); /* get control reg. */
set_cr(reg | cache_bit);
}