tree 8b1b5c2795d425d974ea899551d3111a85a37260
parent c41068658a0c7bac7dfc84abf57a4c459b604e66
author Vignesh Raghavendra <vigneshr@ti.com> 1575867333 +0530
committer Lokesh Vutla <lokeshvutla@ti.com> 1579495228 +0530

soc: ti: k3-navss-ringacc: Flush/invalidate caches on ring push/pop

Flush caches when pushing an element to ring and invalidate caches when
popping an element from ring in Exposed Ring mode. Otherwise DMA
transfers don't work properly in R5 SPL (with caches enabled) where the
core is not in coherency domain.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>