commit 19497b46574eaecc1b233e6d08e0c3d153a92569
author Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Tue Mar 01 09:16:52 2022 +0100
committer Michal Simek <michal.simek@xilinx.com> Wed Mar 09 12:36:37 2022 +0100
tree 775fe9b3f48ca3e242969c0a80915640a2059af6
parent 252b4a3ada20bb3e08ffc2572305812f14d0a8ad

i2c: i2c-cdns: Prevent early termination of write

During sequential loading of data, hold the bus to prevent controller
from sending stop signal in case no data is available in fifo.

Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/2407b39d305999cb42438c5423aebc3b514acabb.1646122610.git.michal.simek@xilinx.com

drivers/i2c/i2c-cdns.c

diff --git a/drivers/i2c/i2c-cdns.c b/drivers/i2c/i2c-cdns.c
index 07d53be..0da9f6f 100644
--- a/drivers/i2c/i2c-cdns.c
+++ b/drivers/i2c/i2c-cdns.c
@@ -257,16 +257,18 @@
 	setbits_le32(&regs->control, CDNS_I2C_CONTROL_CLR_FIFO);
 	clrbits_le32(&regs->control, CDNS_I2C_CONTROL_RW);
 
-	/* Check message size against FIFO depth, and set hold bus bit
-	 * if it is greater than FIFO depth
+	/*
+	 * For sequential data load hold the bus.
 	 */
-	if (len > CDNS_I2C_FIFO_DEPTH)
+	if (len > 1)
 		setbits_le32(&regs->control, CDNS_I2C_CONTROL_HOLD);
 
 	/* Clear the interrupts in status register */
 	writel(CDNS_I2C_INTERRUPTS_MASK, &regs->interrupt_status);
 
-	writel(addr, &regs->address);
+	/* In case of Probe (i.e no data), start the transfer */
+	if (!len)
+		writel(addr, &regs->address);
 
 	while (len-- && !is_arbitration_lost(regs)) {
 		writel(*(cur_data++), &regs->data);