commit 18da3cae1d55dac4a82264dc48af9053ba02a22f
author Vikas Manocha <vikas.manocha@st.com> Sun Feb 12 10:25:52 2017 -0800
committer Tom Rini <trini@konsulko.com> Fri Mar 17 14:15:16 2017 -0400
tree e7ecb0052defc132a19ee15979929388b3a2d950
parent 6ad568cc54d7a4689c2046f18578f82887c2c4ce

ARM: DT: stm32f7: add ethernet pin contol node

It also removes the ethernet pin configuration done during the board
initialization.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>

arch/arm/dts/stm32f746-disco.dts

diff --git a/arch/arm/dts/stm32f746-disco.dts b/arch/arm/dts/stm32f746-disco.dts
index 6734f23..3d6002f 100644
--- a/arch/arm/dts/stm32f746-disco.dts
+++ b/arch/arm/dts/stm32f746-disco.dts
@@ -78,6 +78,7 @@
 
 &mac {
 	status = "okay";
+	pinctrl-0 = <&ethernet_mii>;
 	phy-mode = "rmii";
 	phy-handle = <&phy0>;
 

arch/arm/dts/stm32f746.dtsi

diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi
index 867f399..431e79c 100644
--- a/arch/arm/dts/stm32f746.dtsi
+++ b/arch/arm/dts/stm32f746.dtsi
@@ -117,6 +117,20 @@
 					bias-disable;
 				};
 			};
+			ethernet_mii: mii@0 {
+				pins {
+					pinmux = <STM32F746_PG13_FUNC_ETH_MII_TXD0_ETH_RMII_TXD0>,
+						 <STM32F746_PG14_FUNC_ETH_MII_TXD1_ETH_RMII_TXD1>,
+						 <STM32F746_PG11_FUNC_ETH_MII_TX_EN_ETH_RMII_TX_EN>,
+						 <STM32F746_PA2_FUNC_ETH_MDIO>,
+						 <STM32F746_PC1_FUNC_ETH_MDC>,
+						 <STM32F746_PA1_FUNC_ETH_MII_RX_CLK_ETH_RMII_REF_CLK>,
+						 <STM32F746_PA7_FUNC_ETH_MII_RX_DV_ETH_RMII_CRS_DV>,
+						 <STM32F746_PC4_FUNC_ETH_MII_RXD0_ETH_RMII_RXD0>,
+						 <STM32F746_PC5_FUNC_ETH_MII_RXD1_ETH_RMII_RXD1>;
+					slew-rate = <2>;
+				};
+			};
 		};
 	};
 };