mpc83xx: Fix config of Arbiter, System Priority, and Clock Mode
The config value for:
* CFG_ACR_PIPE_DEP
* CFG_ACR_RPTCNT
* CFG_SPCR_TSEC1EP
* CFG_SPCR_TSEC2EP
* CFG_SCCR_TSEC1CM
* CFG_SCCR_TSEC2CM
Were not being used when setting the appropriate register
Added:
* CFG_SCCR_USBMPHCM
* CFG_SCCR_USBDRCM
* CFG_SCCR_PCICM
* CFG_SCCR_ENCCM
To allow full config of the SCCR.
Also removed random CFG_SCCR settings in MPC8349EMDS, TQM834x, and sbc8349
that were just bogus.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index a6d82b9..0460be9 100644
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -60,17 +60,6 @@
#endif
#endif
-#define CFG_SCCR_INIT (SCCR_DEFAULT & (~SCCR_CLK_MASK))
-#define CFG_SCCR_TSEC1CM SCCR_TSEC1CM_1 /* TSEC1 clock setting */
-#define CFG_SCCR_TSEC2CM SCCR_TSEC2CM_1 /* TSEC2 clock setting */
-#define CFG_SCCR_ENCCM SCCR_ENCCM_3 /* ENC clock setting */
-#define CFG_SCCR_USBCM SCCR_USBCM_3 /* USB clock setting */
-#define CFG_SCCR_VAL ( CFG_SCCR_INIT \
- | CFG_SCCR_TSEC1CM \
- | CFG_SCCR_TSEC2CM \
- | CFG_SCCR_ENCCM \
- | CFG_SCCR_USBCM )
-
#define CONFIG_BOARD_EARLY_INIT_F /* call board_pre_init */
#define CFG_IMMR 0xE0000000
diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h
index 728083b..ed03577 100644
--- a/include/configs/TQM834x.h
+++ b/include/configs/TQM834x.h
@@ -57,17 +57,6 @@
*/
#define CFG_LCRR (LCRR_DBYP | LCRR_CLKDIV_8)
-#define CFG_SCCR_INIT (SCCR_DEFAULT & (~SCCR_CLK_MASK))
-#define CFG_SCCR_TSEC1CM SCCR_TSEC1CM_1 /* TSEC1 clock setting */
-#define CFG_SCCR_TSEC2CM SCCR_TSEC2CM_1 /* TSEC2 clock setting */
-#define CFG_SCCR_ENCCM SCCR_ENCCM_3 /* ENC clock setting */
-#define CFG_SCCR_USBCM SCCR_USBCM_3 /* USB clock setting */
-#define CFG_SCCR_VAL ( CFG_SCCR_INIT \
- | CFG_SCCR_TSEC1CM \
- | CFG_SCCR_TSEC2CM \
- | CFG_SCCR_ENCCM \
- | CFG_SCCR_USBCM )
-
/* board pre init: do not call, nothing to do */
#undef CONFIG_BOARD_EARLY_INIT_F
diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h
index 62606b3..65aac5c 100644
--- a/include/configs/sbc8349.h
+++ b/include/configs/sbc8349.h
@@ -63,17 +63,6 @@
#endif
#endif
-#define CFG_SCCR_INIT (SCCR_DEFAULT & (~SCCR_CLK_MASK))
-#define CFG_SCCR_TSEC1CM SCCR_TSEC1CM_1 /* TSEC1 clock setting */
-#define CFG_SCCR_TSEC2CM SCCR_TSEC2CM_1 /* TSEC2 clock setting */
-#define CFG_SCCR_ENCCM SCCR_ENCCM_3 /* ENC clock setting */
-#define CFG_SCCR_USBCM SCCR_USBCM_3 /* USB clock setting */
-#define CFG_SCCR_VAL ( CFG_SCCR_INIT \
- | CFG_SCCR_TSEC1CM \
- | CFG_SCCR_TSEC2CM \
- | CFG_SCCR_ENCCM \
- | CFG_SCCR_USBCM )
-
#undef CONFIG_BOARD_EARLY_INIT_F /* call board_pre_init */
#define CFG_IMMR 0xE0000000
diff --git a/include/mpc83xx.h b/include/mpc83xx.h
index 33f02ef..c2a4ff5 100644
--- a/include/mpc83xx.h
+++ b/include/mpc83xx.h
@@ -509,6 +509,7 @@
#define SCCR_PCICM_SHIFT 16
/* SCCR bits - MPC8349 specific */
+#ifdef CONFIG_MPC834X
#define SCCR_TSEC1CM 0xc0000000
#define SCCR_TSEC1CM_SHIFT 30
#define SCCR_TSEC1CM_0 0x00000000
@@ -522,6 +523,7 @@
#define SCCR_TSEC2CM_1 0x10000000
#define SCCR_TSEC2CM_2 0x20000000
#define SCCR_TSEC2CM_3 0x30000000
+#endif
#define SCCR_USBMPHCM 0x00c00000
#define SCCR_USBMPHCM_SHIFT 22
@@ -533,13 +535,6 @@
#define SCCR_USBCM_2 0x00A00000
#define SCCR_USBCM_3 0x00F00000
-#define SCCR_CLK_MASK ( SCCR_TSEC1CM_3 \
- | SCCR_TSEC2CM_3 \
- | SCCR_ENCCM_3 \
- | SCCR_USBCM_3 )
-
-#define SCCR_DEFAULT 0xFFFFFFFF
-
/* CSn_BDNS - Chip Select memory Bounds Register
*/
#define CSBNDS_SA 0x00FF0000