dm: sound: exynos: Correct codec bus addresses
For snow the codec is at address 0x11 on the i2c bus, in 7-bit format.
The device tree and code are in 8-bit format (i.e. shifted left one bit).
Fix both. Fix pit in a similar way.
Signed-off-by: Simon Glass <sjg@chromium.org>
diff --git a/arch/arm/dts/exynos5250-snow.dts b/arch/arm/dts/exynos5250-snow.dts
index e99f6e7..cb5067b 100644
--- a/arch/arm/dts/exynos5250-snow.dts
+++ b/arch/arm/dts/exynos5250-snow.dts
@@ -214,8 +214,8 @@
};
};
- soundcodec@22 {
- reg = <0x22>;
+ soundcodec@11 {
+ reg = <0x11>;
compatible = "maxim,max98095-codec";
};
};
diff --git a/arch/arm/dts/exynos5420-peach-pit.dts b/arch/arm/dts/exynos5420-peach-pit.dts
index c86f9d9..bd0a9c1 100644
--- a/arch/arm/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/dts/exynos5420-peach-pit.dts
@@ -69,10 +69,10 @@
i2c@12CD0000 { /* i2c7 */
clock-frequency = <100000>;
- soundcodec@20 {
- reg = <0x20>;
- compatible = "maxim,max98090-codec";
- };
+ soundcodec@10 {
+ reg = <0x10>;
+ compatible = "maxim,max98090-codec";
+ };
edp-lvds-bridge@48 {
compatible = "parade,ps8625";
diff --git a/arch/arm/dts/exynos5800-peach-pi.dts b/arch/arm/dts/exynos5800-peach-pi.dts
index 7498519..239781b 100644
--- a/arch/arm/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/dts/exynos5800-peach-pi.dts
@@ -81,10 +81,10 @@
i2c@12CD0000 { /* i2c7 */
clock-frequency = <100000>;
- soundcodec@20 {
- reg = <0x20>;
- compatible = "maxim,max98090-codec";
- };
+ soundcodec@10 {
+ reg = <0x10>;
+ compatible = "maxim,max98090-codec";
+ };
};
sound@3830000 {
diff --git a/drivers/sound/max98095.c b/drivers/sound/max98095.c
index 6a98dac..7a3dbd0 100644
--- a/drivers/sound/max98095.c
+++ b/drivers/sound/max98095.c
@@ -569,8 +569,7 @@
i2c_set_bus_num(pcodec_info.i2c_bus);
- /* shift the device address by 1 for 7 bit addressing */
- max98095_info.i2c_addr = pcodec_info.i2c_dev_addr >> 1;
+ max98095_info.i2c_addr = pcodec_info.i2c_dev_addr;
ret = max98095_device_init(&max98095_info);
if (ret < 0) {
debug("%s: max98095 codec chip init failed\n", __func__);