pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' drive strength
RK3288 pmu_gpio0 drive strength setting have no higher 16 writing
corresponding bits, need to read before write the register.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
index 6ae9f1c..d1b9aeb 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
@@ -143,8 +143,15 @@
return ret;
}
- /* enable the write to the equivalent lower bits */
- data = ((1 << ROCKCHIP_DRV_BITS_PER_PIN) - 1) << (bit + 16);
+ /* bank0 is special, there are no higher 16 bit writing bits. */
+ if (bank->bank_num == 0) {
+ regmap_read(regmap, reg, &data);
+ data &= ~(((1 << ROCKCHIP_DRV_BITS_PER_PIN) - 1) << bit);
+ } else {
+ /* enable the write to the equivalent lower bits */
+ data = ((1 << ROCKCHIP_DRV_BITS_PER_PIN) - 1) << (bit + 16);
+ }
+
data |= (ret << bit);
ret = regmap_write(regmap, reg, data);
return ret;