armv7: Add workaround for USB erratum A-009008
USB High Speed (HS) EYE Height Adjustment
USB HS speed eye diagram fails with the default value at
many corners, particularly at a high temperature
Optimal eye at TXREFTUNE value to 0x9 is observed, change
set the same value.
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[YS: Reordered Kconfig options]
Reviewed-by: York Sun <york.sun@nxp.com>
diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig
index 90d99e6..be30dd8 100644
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -2,6 +2,7 @@
bool
select SYS_FSL_ERRATUM_A008378
select SYS_FSL_ERRATUM_A008407
+ select SYS_FSL_ERRATUM_A009008
select SYS_FSL_ERRATUM_A009663
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_A010315
@@ -58,6 +59,11 @@
Offset for CCI400 base.
CCI400 base addr = CCSRBAR + CCI400_OFFSET
+config SYS_FSL_ERRATUM_A009008
+ bool
+ help
+ Workaround for USB PHY erratum A009008
+
config SYS_FSL_ERRATUM_A010315
bool "Workaround for PCIe erratum A010315"