arm64: Layerscape: Survive LPI one-way reset workaround
The workaround of LPI one-way reset issue is broken by the series:
https://patchwork.ozlabs.org/project/uboot/list/?series=192398
This patch is to add DT node for GIC RD tables and create corresponding
reserved-memory node in kernel DT to fix it.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi
index 9911690..bf6373d 100644
--- a/arch/arm/dts/fsl-ls1028a.dtsi
+++ b/arch/arm/dts/fsl-ls1028a.dtsi
@@ -44,6 +44,12 @@
IRQ_TYPE_LEVEL_LOW)>;
};
+ gic_lpi_base: syscon@0x80000000 {
+ compatible = "gic-lpi-base";
+ reg = <0x0 0x80000000 0x0 0x100000>;
+ max-gic-redistributors = <2>;
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
diff --git a/arch/arm/dts/fsl-ls1088a.dtsi b/arch/arm/dts/fsl-ls1088a.dtsi
index bf303c6..6653794 100644
--- a/arch/arm/dts/fsl-ls1088a.dtsi
+++ b/arch/arm/dts/fsl-ls1088a.dtsi
@@ -26,6 +26,12 @@
interrupts = <1 9 0x4>;
};
+ gic_lpi_base: syscon@0x80000000 {
+ compatible = "gic-lpi-base";
+ reg = <0x0 0x80000000 0x0 0x100000>;
+ max-gic-redistributors = <8>;
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */
diff --git a/arch/arm/dts/fsl-ls2080a.dtsi b/arch/arm/dts/fsl-ls2080a.dtsi
index 90a0a3f..6b7bf8e 100644
--- a/arch/arm/dts/fsl-ls2080a.dtsi
+++ b/arch/arm/dts/fsl-ls2080a.dtsi
@@ -26,6 +26,12 @@
interrupts = <1 9 0x4>;
};
+ gic_lpi_base: syscon@0x80000000 {
+ compatible = "gic-lpi-base";
+ reg = <0x0 0x80000000 0x0 0x100000>;
+ max-gic-redistributors = <8>;
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */
diff --git a/arch/arm/dts/fsl-lx2160a.dtsi b/arch/arm/dts/fsl-lx2160a.dtsi
index dee1e2f..37a4f39 100644
--- a/arch/arm/dts/fsl-lx2160a.dtsi
+++ b/arch/arm/dts/fsl-lx2160a.dtsi
@@ -43,6 +43,12 @@
interrupts = <1 9 0x4>;
};
+ gic_lpi_base: syscon@0x80000000 {
+ compatible = "gic-lpi-base";
+ reg = <0x0 0x80000000 0x0 0x200000>;
+ max-gic-redistributors = <16>;
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */